i915/gt/intel_gtt.c

43 	struct drm_i915_gem_object *obj;
57 	obj = __i915_gem_object_create_lmem_with_ps(vm->i915, sz, sz,
64 	if (!IS_ERR(obj)) {
65 		obj->base.resv = i915_vm_resv_get(vm);
66 		obj->shares_resv_from = vm;
69 			i915_drm_client_add_object(vm->fpriv->client, obj);
72 	return obj;
77 	struct drm_i915_gem_object *obj;
82 	obj = i915_gem_object_create_internal(vm->i915, sz);
88 	if (!IS_ERR(obj)) {
89 		obj->base.resv = i915_vm_resv_get(vm);
90 		obj->shares_resv_from = vm;
93 			i915_drm_client_add_object(vm->fpriv->client, obj);
96 	return obj;
99 int map_pt_dma(struct i915_address_space *vm, struct drm_i915_gem_object *obj)
104 	type = intel_gt_coherent_map_type(vm->gt, obj, true);
115 	vaddr = i915_gem_object_pin_map_unlocked(obj, type);
119 	i915_gem_object_make_unshrinkable(obj);
123 int map_pt_dma_locked(struct i915_address_space *vm, struct drm_i915_gem_object *obj)
128 	type = intel_gt_coherent_map_type(vm->gt, obj, true);
139 	vaddr = i915_gem_object_pin_map(obj, type);
143 	i915_gem_object_make_unshrinkable(obj);
152 		struct drm_i915_gem_object *obj = vma->obj;
154 		if (!i915_gem_object_get_rcu(obj)) {
177 			i915_gem_object_put(obj);
382 		struct drm_i915_gem_object *obj;
384 		obj = vm->alloc_scratch_dma(vm, size);
385 		if (IS_ERR(obj))
388 		if (map_pt_dma(vm, obj))
392 		if (obj->mm.page_sizes.sg < size)
396 		if (__px_dma(obj) & (size - 1))
408 		poison_scratch_page(obj);
410 		vm->scratch[0] = obj;
415 		i915_gem_object_put(obj);
698 	struct drm_i915_gem_object *obj;
701 	obj = i915_gem_object_create_internal(vm->i915, PAGE_ALIGN(size));
702 	if (IS_ERR(obj))
703 		return ERR_CAST(obj);
705 	i915_gem_object_set_cache_coherency(obj, I915_CACHE_LLC);
707 	vma = i915_vma_instance(obj, vm, NULL);
709 		i915_gem_object_put(obj);