i915/gt/intel_ggtt.c

58 	struct drm_i915_private *i915 = ggtt->vm.i915;
65 	ggtt->vm.has_read_only = IS_VALLEYVIEW(i915);
67 	if (!HAS_LLC(i915) && !HAS_PPGTT(i915))
89  * @i915: i915 device
91 int i915_ggtt_init_hw(struct drm_i915_private *i915)
101 	ret = ggtt_init_hw(to_gt(i915)->ggtt);
120 	drm_WARN_ON(&vm->i915->drm, !vm->is_ggtt && !vm->is_dpt);
123 	i915_gem_drain_freed_objects(vm->i915);
199 static bool needs_wc_ggtt_mapping(struct drm_i915_private *i915)
208 	if (!IS_GEN9_LP(i915) && GRAPHICS_VER(i915) < 11)
224 	if (needs_wc_ggtt_mapping(ggtt->vm.i915))
240 	struct drm_i915_private *i915 = ggtt->vm.i915;
248 		else if (GRAPHICS_VER(i915) >= 12)
610  * through the GMADR mapped BAR (i915->mm.gtt->gtt).
796 		drm_dbg(&ggtt->vm.i915->drm,
884 		drm_dbg(&ggtt->vm.i915->drm,
900 		drm_dbg(&ggtt->vm.i915->drm,
1016 int i915_init_ggtt(struct drm_i915_private *i915)
1020 	ret = init_ggtt(to_gt(i915)->ggtt);
1024 	if (INTEL_PPGTT(i915) == INTEL_PPGTT_ALIASING) {
1025 		ret = init_aliasing_ppgtt(to_gt(i915)->ggtt);
1027 			cleanup_init_ggtt(to_gt(i915)->ggtt);
1037 	flush_workqueue(ggtt->vm.i915->wq);
1038 	i915_gem_drain_freed_objects(ggtt->vm.i915);
1076  * @i915: i915 device
1078 void i915_ggtt_driver_release(struct drm_i915_private *i915)
1080 	struct i915_ggtt *ggtt = to_gt(i915)->ggtt;
1091  * @i915: i915 device
1093 void i915_ggtt_driver_late_release(struct drm_i915_private *i915)
1095 	struct i915_ggtt *ggtt = to_gt(i915)->ggtt;
1135 static unsigned int gen6_gttmmadr_size(struct drm_i915_private *i915)
1141 	GEM_BUG_ON(GRAPHICS_VER(i915) < 6);
1142 	return (GRAPHICS_VER(i915) < 8) ? SZ_4M : SZ_16M;
1145 static unsigned int gen6_gttadr_offset(struct drm_i915_private *i915)
1147 	return gen6_gttmmadr_size(i915) / 2;
1152 	struct drm_i915_private *i915 = ggtt->vm.i915;
1154 	struct pci_dev *pdev = to_pci_dev(i915->drm.dev);
1159 	GEM_WARN_ON(pci_resource_len(pdev, GEN4_GTTMMADR_BAR) != gen6_gttmmadr_size(i915));
1161 	if (i915_direct_stolen_access(i915)) {
1162 		drm_dbg(&i915->drm, "Using direct GSM access\n");
1165 		phys_addr = pci_resource_start(pdev, GEN4_GTTMMADR_BAR) + gen6_gttadr_offset(i915);
1168 	if (needs_wc_ggtt_mapping(i915))
1174 		drm_err(&i915->drm, "Failed to map the ggtt page table\n");
1181 		drm_err(&i915->drm, "Scratch setup failed\n");
1193 				    i915_gem_get_pat_index(i915,
1216 	struct drm_i915_private *i915 = ggtt->vm.i915;
1217 	struct pci_dev *pdev = to_pci_dev(i915->drm.dev);
1221 	if (!HAS_LMEM(i915) && !HAS_LMEMBAR_SMEM_STOLEN(i915)) {
1230 	if (IS_CHERRYVIEW(i915))
1251 	if (intel_vm_no_concurrent_access_wa(i915)) {
1268 	if (i915_ggtt_require_binder(i915)) {
1287 	if (GRAPHICS_VER_FULL(i915) >= IP_VER(12, 70))
1393 	struct drm_i915_private *i915 = ggtt->vm.i915;
1394 	struct pci_dev *pdev = to_pci_dev(i915->drm.dev);
1410 		drm_err(&i915->drm, "Unknown GMADR size (%pa)\n",
1424 	if (!HAS_FULL_PPGTT(i915))
1433 	if (HAS_EDRAM(i915))
1435 	else if (IS_HASWELL(i915))
1437 	else if (IS_VALLEYVIEW(i915))
1439 	else if (GRAPHICS_VER(i915) >= 7)
1452 	struct drm_i915_private *i915 = gt->i915;
1456 	ggtt->vm.i915 = i915;
1457 	ggtt->vm.dma = i915->drm.dev;
1460 	if (GRAPHICS_VER(i915) >= 8)
1462 	else if (GRAPHICS_VER(i915) >= 6)
1473 		drm_err(&i915->drm,
1483 		drm_err(&i915->drm,
1491 	drm_dbg(&i915->drm, "GGTT size = %lluM\n", ggtt->vm.total >> 20);
1492 	drm_dbg(&i915->drm, "GMADR size = %lluM\n",
1494 	drm_dbg(&i915->drm, "DSM size = %lluM\n",
1502  * @i915: i915 device
1504 int i915_ggtt_probe_hw(struct drm_i915_private *i915)
1509 	for_each_gt(gt, i915, i) {
1515 	ret = ggtt_probe_hw(to_gt(i915)->ggtt, to_gt(i915));
1519 	if (i915_vtd_active(i915))
1520 		drm_info(&i915->drm, "VT-d active for gfx access\n");
1525 struct i915_ggtt *i915_ggtt_create(struct drm_i915_private *i915)
1529 	ggtt = drmm_kzalloc(&i915->drm, sizeof(*ggtt), GFP_KERNEL);
1538 int i915_ggtt_enable_hw(struct drm_i915_private *i915)
1540 	if (GRAPHICS_VER(i915) < 6)
1541 		return intel_ggtt_gmch_enable_hw(i915);
1561 	drm_WARN_ON(&vm->i915->drm, !vm->is_ggtt && !vm->is_dpt);
1581 					 i915_gem_get_pat_index(vm->i915,