Lines Matching refs:graphics_ver
56 /* mmio bases table *must* be sorted in reverse graphics_ver order */
58 u32 graphics_ver : 8;
68 { .graphics_ver = 1, .base = RENDER_RING_BASE }
75 { .graphics_ver = 6, .base = BLT_RING_BASE }
82 { .graphics_ver = 12, .base = XEHPC_BCS1_RING_BASE }
89 { .graphics_ver = 12, .base = XEHPC_BCS2_RING_BASE }
96 { .graphics_ver = 12, .base = XEHPC_BCS3_RING_BASE }
103 { .graphics_ver = 12, .base = XEHPC_BCS4_RING_BASE }
110 { .graphics_ver = 12, .base = XEHPC_BCS5_RING_BASE }
117 { .graphics_ver = 12, .base = XEHPC_BCS6_RING_BASE }
124 { .graphics_ver = 12, .base = XEHPC_BCS7_RING_BASE }
131 { .graphics_ver = 12, .base = XEHPC_BCS8_RING_BASE }
138 { .graphics_ver = 11, .base = GEN11_BSD_RING_BASE },
139 { .graphics_ver = 6, .base = GEN6_BSD_RING_BASE },
140 { .graphics_ver = 4, .base = BSD_RING_BASE }
147 { .graphics_ver = 11, .base = GEN11_BSD2_RING_BASE },
148 { .graphics_ver = 8, .base = GEN8_BSD2_RING_BASE }
155 { .graphics_ver = 11, .base = GEN11_BSD3_RING_BASE }
162 { .graphics_ver = 11, .base = GEN11_BSD4_RING_BASE }
169 { .graphics_ver = 12, .base = XEHP_BSD5_RING_BASE }
176 { .graphics_ver = 12, .base = XEHP_BSD6_RING_BASE }
183 { .graphics_ver = 12, .base = XEHP_BSD7_RING_BASE }
190 { .graphics_ver = 12, .base = XEHP_BSD8_RING_BASE }
197 { .graphics_ver = 11, .base = GEN11_VEBOX_RING_BASE },
198 { .graphics_ver = 7, .base = VEBOX_RING_BASE }
205 { .graphics_ver = 11, .base = GEN11_VEBOX2_RING_BASE }
212 { .graphics_ver = 12, .base = XEHP_VEBOX3_RING_BASE }
219 { .graphics_ver = 12, .base = XEHP_VEBOX4_RING_BASE }
226 { .graphics_ver = 12, .base = GEN12_COMPUTE0_RING_BASE }
233 { .graphics_ver = 12, .base = GEN12_COMPUTE1_RING_BASE }
240 { .graphics_ver = 12, .base = GEN12_COMPUTE2_RING_BASE }
247 { .graphics_ver = 12, .base = GEN12_COMPUTE3_RING_BASE }
254 { .graphics_ver = 12, .base = MTL_GSC_RING_BASE }
319 gt_dbg(gt, "graphics_ver = %d CXT_SIZE = %d bytes [0x%08x]\n",
349 if (GRAPHICS_VER(i915) >= bases[i].graphics_ver)