Lines Matching defs:cs
43 u32 *gen8_emit_fini_breadcrumb_xcs(struct i915_request *rq, u32 *cs);
44 u32 *gen12_emit_fini_breadcrumb_xcs(struct i915_request *rq, u32 *cs);
46 u32 *gen8_emit_fini_breadcrumb_rcs(struct i915_request *rq, u32 *cs);
47 u32 *gen11_emit_fini_breadcrumb_rcs(struct i915_request *rq, u32 *cs);
48 u32 *gen12_emit_fini_breadcrumb_rcs(struct i915_request *rq, u32 *cs);
50 u32 *gen12_emit_aux_table_inv(struct intel_engine_cs *engine, u32 *cs);
79 __gen8_emit_write_rcs(u32 *cs, u32 value, u32 offset, u32 flags0, u32 flags1)
81 *cs++ = GFX_OP_PIPE_CONTROL(6) | flags0;
82 *cs++ = flags1 | PIPE_CONTROL_QW_WRITE;
83 *cs++ = offset;
84 *cs++ = 0;
85 *cs++ = value;
86 *cs++ = 0; /* We're thrashing one extra dword. */
88 return cs;
92 gen8_emit_ggtt_write_rcs(u32 *cs, u32 value, u32 gtt_offset, u32 flags)
97 return __gen8_emit_write_rcs(cs,
105 gen12_emit_ggtt_write_rcs(u32 *cs, u32 value, u32 gtt_offset, u32 flags0, u32 flags1)
110 return __gen8_emit_write_rcs(cs,
118 __gen8_emit_flush_dw(u32 *cs, u32 value, u32 gtt_offset, u32 flags)
120 *cs++ = (MI_FLUSH_DW + 1) | flags;
121 *cs++ = gtt_offset;
122 *cs++ = 0;
123 *cs++ = value;
125 return cs;
129 gen8_emit_ggtt_write(u32 *cs, u32 value, u32 gtt_offset, u32 flags)
136 return __gen8_emit_flush_dw(cs,