gem/selftests/i915_gem_client_blt.c

94 	struct i915_vma *vma;
129 	if (GRAPHICS_VER(buf->vma->vm->i915) < 9)
133 	if (buf->tiling == CLIENT_TILING_X && !fastblit_supports_x_tiling(buf->vma->vm->i915))
193 		*cs++ = lower_32_bits(i915_vma_offset(dst->vma));
194 		*cs++ = upper_32_bits(i915_vma_offset(dst->vma));
197 		*cs++ = lower_32_bits(i915_vma_offset(src->vma));
198 		*cs++ = upper_32_bits(i915_vma_offset(src->vma));
239 		*cs++ = lower_32_bits(i915_vma_offset(dst->vma));
241 			*cs++ = upper_32_bits(i915_vma_offset(dst->vma));
244 		*cs++ = lower_32_bits(i915_vma_offset(src->vma));
246 			*cs++ = upper_32_bits(i915_vma_offset(src->vma));
262 		i915_vma_put(t->buffers[i].vma);
264 	i915_vma_put(t->scratch.vma);
273 	struct i915_vma *vma;
282 	vma = i915_vma_instance(obj, t->ce->vm, NULL);
283 	if (IS_ERR(vma))
286 	return vma;
308 	t->scratch.vma = create_vma(t, false);
309 	if (IS_ERR(t->scratch.vma)) {
311 		return PTR_ERR(t->scratch.vma);
315 		struct i915_vma *vma;
317 		vma = create_vma(t, HAS_LMEM(i915) && i % 2);
318 		if (IS_ERR(vma)) {
320 			return PTR_ERR(vma);
323 		t->buffers[i].vma = vma;
339 	i915_gem_object_flush_map(t->scratch.vma->obj);
426 	vaddr = i915_gem_object_pin_map_unlocked(buf->vma->obj, I915_MAP_WC);
433 		u64 v = tiled_offset(buf->vma->vm->gt,
447 	i915_gem_object_unpin_map(buf->vma->obj);
451 static int pin_buffer(struct i915_vma *vma, u64 addr)
455 	if (drm_mm_node_allocated(&vma->node) && i915_vma_offset(vma) != addr) {
456 		err = i915_vma_unbind_unlocked(vma);
461 	err = i915_vma_pin(vma, 0, 0, PIN_USER | PIN_OFFSET_FIXED | addr);
465 	GEM_BUG_ON(i915_vma_offset(vma) != addr);
477 	err = pin_buffer(src->vma, src_addr);
483 	err = pin_buffer(dst->vma, dst_addr);
507 		err = igt_vma_move_to_active_unlocked(src->vma, rq, 0);
509 		err = igt_vma_move_to_active_unlocked(dst->vma, rq, 0);
525 	i915_vma_unpin(dst->vma);
527 	i915_vma_unpin(src->vma);
604 	map = i915_gem_object_pin_map_unlocked(t->scratch.vma->obj, I915_MAP_WC);
624 	i915_gem_object_unpin_map(t->scratch.vma->obj);