i915/display/intel_snps_phy.c

66 	struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
72 	if (drm_WARN_ON_ONCE(&dev_priv->drm, !trans))
83 		intel_de_write(dev_priv, SNPS_PHY_TX_EQ(ln, phy), val);
1825 	struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
1835 	intel_de_write(dev_priv, SNPS_PHY_MPLLB_CP(phy), pll_state->mpllb_cp);
1836 	intel_de_write(dev_priv, SNPS_PHY_MPLLB_DIV(phy), pll_state->mpllb_div);
1837 	intel_de_write(dev_priv, SNPS_PHY_MPLLB_DIV2(phy), pll_state->mpllb_div2);
1838 	intel_de_write(dev_priv, SNPS_PHY_MPLLB_SSCEN(phy), pll_state->mpllb_sscen);
1839 	intel_de_write(dev_priv, SNPS_PHY_MPLLB_SSCSTEP(phy), pll_state->mpllb_sscstep);
1840 	intel_de_write(dev_priv, SNPS_PHY_MPLLB_FRACN1(phy), pll_state->mpllb_fracn1);
1841 	intel_de_write(dev_priv, SNPS_PHY_MPLLB_FRACN2(phy), pll_state->mpllb_fracn2);
1852 	intel_de_rmw(dev_priv, enable_reg, 0, PLL_ENABLE);
1861 	intel_de_write(dev_priv, SNPS_PHY_MPLLB_DIV(phy),
1869 	if (intel_de_wait_for_set(dev_priv, enable_reg, PLL_LOCK, 5))
1870 		drm_dbg_kms(&dev_priv->drm, "Port %c PLL not locked\n", phy_name(phy));
1955 	struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
1958 	pll_state->mpllb_cp = intel_de_read(dev_priv, SNPS_PHY_MPLLB_CP(phy));
1959 	pll_state->mpllb_div = intel_de_read(dev_priv, SNPS_PHY_MPLLB_DIV(phy));
1960 	pll_state->mpllb_div2 = intel_de_read(dev_priv, SNPS_PHY_MPLLB_DIV2(phy));
1961 	pll_state->mpllb_sscen = intel_de_read(dev_priv, SNPS_PHY_MPLLB_SSCEN(phy));
1962 	pll_state->mpllb_sscstep = intel_de_read(dev_priv, SNPS_PHY_MPLLB_SSCSTEP(phy));
1963 	pll_state->mpllb_fracn1 = intel_de_read(dev_priv, SNPS_PHY_MPLLB_FRACN1(phy));
1964 	pll_state->mpllb_fracn2 = intel_de_read(dev_priv, SNPS_PHY_MPLLB_FRACN2(phy));
1972 	pll_state->ref_control = intel_de_read(dev_priv, SNPS_PHY_REF_CONTROL(phy)) &