Lines Matching defs:temp
2042 u32 temp;
2084 temp = intel_de_read(i915, BXT_PORT_PLL(phy, ch, 6));
2085 temp &= ~PORT_PLL_PROP_COEFF_MASK;
2086 temp &= ~PORT_PLL_INT_COEFF_MASK;
2087 temp &= ~PORT_PLL_GAIN_CTL_MASK;
2088 temp |= hw_state->pll6;
2089 intel_de_write(i915, BXT_PORT_PLL(phy, ch, 6), temp);
2098 temp = intel_de_read(i915, BXT_PORT_PLL(phy, ch, 10));
2099 temp &= ~PORT_PLL_DCO_AMP_OVR_EN_H;
2100 temp &= ~PORT_PLL_DCO_AMP_MASK;
2101 temp |= hw_state->pll10;
2102 intel_de_write(i915, BXT_PORT_PLL(phy, ch, 10), temp);
2105 temp = intel_de_read(i915, BXT_PORT_PLL_EBB_4(phy, ch));
2106 temp |= PORT_PLL_RECALIBRATE;
2107 intel_de_write(i915, BXT_PORT_PLL_EBB_4(phy, ch), temp);
2108 temp &= ~PORT_PLL_10BIT_CLK_ENABLE;
2109 temp |= hw_state->ebb4;
2110 intel_de_write(i915, BXT_PORT_PLL_EBB_4(phy, ch), temp);
2121 temp = intel_de_read(i915, BXT_PORT_TX_DW5_LN(phy, ch, 0));
2122 temp |= DCC_DELAY_RANGE_2;
2123 intel_de_write(i915, BXT_PORT_TX_DW5_GRP(phy, ch), temp);
2130 temp = intel_de_read(i915, BXT_PORT_PCS_DW12_LN01(phy, ch));
2131 temp &= ~LANE_STAGGER_MASK;
2132 temp &= ~LANESTAGGER_STRAP_OVRD;
2133 temp |= hw_state->pcsdw12;
2134 intel_de_write(i915, BXT_PORT_PCS_DW12_GRP(phy, ch), temp);