Lines Matching defs:ctrl1
1370 hw_state->ctrl1 << (id * 6));
1444 hw_state->ctrl1 = (val >> (id * 6)) & 0x3f;
1483 hw_state->ctrl1 = (val >> (id * 6)) & 0x3f;
1820 hw_state->ctrl1 =
1846 u32 ctrl1;
1852 ctrl1 = DPLL_CTRL1_OVERRIDE(0);
1855 ctrl1 |= DPLL_CTRL1_LINK_RATE(DPLL_CTRL1_LINK_RATE_810, 0);
1858 ctrl1 |= DPLL_CTRL1_LINK_RATE(DPLL_CTRL1_LINK_RATE_1350, 0);
1861 ctrl1 |= DPLL_CTRL1_LINK_RATE(DPLL_CTRL1_LINK_RATE_2700, 0);
1865 ctrl1 |= DPLL_CTRL1_LINK_RATE(DPLL_CTRL1_LINK_RATE_1620, 0);
1868 ctrl1 |= DPLL_CTRL1_LINK_RATE(DPLL_CTRL1_LINK_RATE_1080, 0);
1871 ctrl1 |= DPLL_CTRL1_LINK_RATE(DPLL_CTRL1_LINK_RATE_2160, 0);
1875 hw_state->ctrl1 = ctrl1;
1887 switch ((hw_state->ctrl1 & DPLL_CTRL1_LINK_RATE_MASK(0)) >>
1966 * ctrl1 register is already shifted for each pll, just use 0 to get
1969 if (hw_state->ctrl1 & DPLL_CTRL1_HDMI_MODE(0))
1986 drm_printf(p, "dpll_hw_state: ctrl1: 0x%x, cfgcr1: 0x%x, cfgcr2: 0x%x\n",
1987 hw_state->ctrl1, hw_state->cfgcr1, hw_state->cfgcr2);
1996 return a->ctrl1 == b->ctrl1 &&