Lines Matching refs:bpp
2904 /* Bspec claims that we can't use dithering for 30bpp pipes. */
3295 int ilk_get_lanes_required(int target_clock, int link_bw, int bpp)
3302 u32 bps = target_clock * bpp * 21 / 20;
3897 * pixel_clock = ((m/n)*(link_clock * nr_lanes))/bpp
3899 * pixel_clock = ((m * link_clock * nr_lanes)/(n*bpp))
4320 int bpp;
4324 bpp = 6 * 3;
4327 bpp = 8 * 3;
4330 bpp = 10 * 3;
4333 bpp = 12 * 3;
4340 if (bpp < crtc_state->pipe_bpp) {
4342 "[CONNECTOR:%d:%s] Limiting display bpp to %d "
4343 "(EDID bpp %d, max requested bpp %d, max platform bpp %d)\n",
4345 bpp, 3 * info->bpc,
4349 crtc_state->pipe_bpp = bpp;
4364 int bpp, i;
4368 bpp = 10*3;
4370 bpp = 12*3;
4372 bpp = 8*3;
4374 crtc_state->pipe_bpp = bpp;
4376 /* Clamp display bpp to connector max bpp */
4657 "[CRTC:%d:%s] Link bpp limited to " BPP_X16_FMT "\n",
4756 "[CRTC:%d:%s] hw max bpp: %i, pipe bpp: %i, dithering: %i\n",
6379 * The bpp limit for a pipe is below the minimum it supports, set the