i915/display/intel_ddi.c

31 #include <drm/display/drm_scdc_helper.h>
32 #include <drm/drm_privacy_screen_consumer.h>
130 	if (drm_WARN_ON_ONCE(&dev_priv->drm, !trans))
162 	if (drm_WARN_ON_ONCE(&dev_priv->drm, !trans))
185 		drm_err(&i915->drm, "Timeout waiting for DDI BUF %c to get idle\n",
199 		drm_err(&dev_priv->drm, "Timeout waiting for DDI BUF %c to get idle\n",
239 		drm_err(&dev_priv->drm, "Timeout waiting for DDI BUF %c to get active\n",
397 	drm_WARN_ON(&dev_priv->drm, transcoder_is_dsi(cpu_transcoder));
420 	drm_WARN_ON(&dev_priv->drm, crtc_state->limited_color_range &&
565 			drm_WARN_ON(&dev_priv->drm,
667 		drm_dbg_kms(display->drm, "Quirk Increase DDI disabled time\n");
842 		drm_dbg_kms(&dev_priv->drm,
847 		drm_dbg_kms(&dev_priv->drm,
855 		drm_dbg_kms(&dev_priv->drm,
868 			drm_err(&dev_priv->drm,
929 	drm_WARN_ON(&i915->drm, dig_port->aux_wakeref);
964 	if (drm_WARN_ON(&dev_priv->drm,
971 		drm_WARN_ON(&dev_priv->drm, dig_port->ddi_io_wakeref);
1050 		if (drm_WARN_ON_ONCE(&dev_priv->drm, !trans))
1058 		drm_err(&dev_priv->drm, "Invalid I_boost value %u\n", iboost);
1077 	if (drm_WARN_ON(&dev_priv->drm, n_entries < 1))
1079 	if (drm_WARN_ON(&dev_priv->drm,
1119 	if (drm_WARN_ON_ONCE(&dev_priv->drm, !trans))
1236 	if (drm_WARN_ON_ONCE(&dev_priv->drm, !trans))
1337 	if (drm_WARN_ON_ONCE(&dev_priv->drm, !trans))
1403 	drm_WARN(&i915->drm, 1,
1435 	if (drm_WARN_ON_ONCE(&i915->drm, !trans))
1444 	if (drm_WARN_ON_ONCE(&i915->drm, level >= n_entries))
1469 	drm_dbg_kms(&dev_priv->drm, "Using signal levels %08x\n",
1529 	if (drm_WARN_ON(&i915->drm, !pll))
1573 	if (drm_WARN_ON(&i915->drm, !pll))
1617 	if (drm_WARN_ON(&i915->drm, !pll))
1624 	if (drm_WARN_ON(&i915->drm,
1683 	if (drm_WARN_ON(&i915->drm, !pll))
1727 	if (drm_WARN_ON(&i915->drm, !pll))
1771 	if (drm_WARN_ON(&i915->drm, !pll))
1878 	if (drm_WARN_ON(&i915->drm, !pll))
1946 	if (drm_WARN_ON(&i915->drm, !pll))
2041 		if (drm_WARN_ON(&i915->drm, is_mst))
2056 		for_each_intel_encoder(&i915->drm, other_encoder) {
2060 			if (drm_WARN_ON(&i915->drm,
2075 	drm_notice(&i915->drm,
2112 		drm_WARN_ON(&dev_priv->drm,
2208 		drm_dbg_kms(&i915->drm,
2224 		drm_dbg_kms(&i915->drm, "Failed to set FEC_READY to %s in the sink\n",
2230 		drm_dbg_kms(&i915->drm, "Failed to clear FEC detected flags\n");
2260 		drm_dbg_kms(&i915->drm, "Timeout waiting for FEC %s to get detected\n",
2263 		drm_dbg_kms(&i915->drm, "FEC detected status read error: %d\n", status);
2285 		drm_err(&i915->drm,
2370 	if (drm_WARN_ON(&i915->drm, !(intel_ddi_splitter_pipe_mask(i915) & BIT(pipe)))) {
2377 		drm_WARN(&i915->drm, true,
2452 		drm_err(&dev_priv->drm, "Timeout waiting for D2D Link enable for DDI/PORT_BUF_CTL %c\n",
2651 		drm_WARN_ON(&dev_priv->drm, dig_port->ddi_io_wakeref);
2756 		drm_WARN_ON(&dev_priv->drm,
2759 		drm_WARN_ON(&dev_priv->drm, is_mst && port == PORT_A);
2776 		drm_WARN_ON(&dev_priv->drm, dig_port->ddi_io_wakeref);
2852 	drm_WARN_ON(&dev_priv->drm, dig_port->ddi_io_wakeref);
2887 	drm_WARN_ON(&dev_priv->drm, crtc_state->has_pch_encoder);
2929 		drm_err(&dev_priv->drm, "Timeout waiting for D2D Link disable for DDI/PORT_BUF_CTL %c\n",
3107 	for_each_intel_crtc_in_pipe_mask(&dev_priv->drm, pipe_crtc,
3119 	for_each_intel_crtc_in_pipe_mask(&dev_priv->drm, pipe_crtc,
3256 	drm_WARN_ON(&dev_priv->drm, DISPLAY_VER(dev_priv) < 9);
3258 	if (drm_WARN_ON(&dev_priv->drm, port < PORT_A || port > PORT_E))
3278 		drm_dbg_kms(&dev_priv->drm,
3357 		drm_WARN_ON(&dev_priv->drm, !intel_tc_port_in_legacy_mode(dig_port));
3383 	for_each_intel_crtc_in_pipe_mask_reverse(&i915->drm, pipe_crtc,
3431 		drm_dbg_kms(&i915->drm,
3493 	for_each_intel_crtc_in_pipe_mask(&i915->drm, pipe_crtc,
3694 		drm_err(&dev_priv->drm,
3804 	drm_WARN_ON(&dev_priv->drm,
3941 	if (drm_WARN_ON(&dev_priv->drm, transcoder_is_dsi(cpu_transcoder)))
3975 			     &pipe_config->infoframes.drm);
3998 	if (drm_WARN_ON(&i915->drm, !pll))
4003 	drm_WARN_ON(&i915->drm, !pll_active);
4075 	if (drm_WARN_ON(&i915->drm, !pll))
4103 	if (drm_WARN_ON(&i915->drm, !pll))
4115 	drm_WARN_ON(&i915->drm, !pll_active);
4172 		drm_dbg_kms(&i915->drm, "[ENCODER:%d:%s] Forcing full modeset to compute TC port DPLLs\n",
4332 	drm_dbg_kms(&i915->drm, "[ENCODER:%d:%s] [CRTC:%d:%s]\n",
4489 	ret = drm_modeset_lock(&dev_priv->drm.mode_config.connection_mutex,
4506 	drm_WARN_ON(&dev_priv->drm,
4522 		drm_err(&dev_priv->drm, "[CONNECTOR:%d:%s] Failed to read TMDS config: %d\n",
4689 		drm_dbg_kms(&dev_priv->drm,
4838 	return !drm_WARN(&i915->drm, !IS_ALDERLAKE_P(i915) &&
4847 	for_each_intel_encoder(&i915->drm, encoder) {
4870 		drm_dbg_kms(&dev_priv->drm,
4879 		drm_dbg_kms(&dev_priv->drm,
4902 		drm_dbg_kms(&dev_priv->drm, "PORT %c / PHY %c reserved by HTI\n",
4919 		drm_dbg_kms(&dev_priv->drm, "VBT says port %c has lspcon\n",
4924 		drm_dbg_kms(&dev_priv->drm,
4932 		drm_dbg_kms(&dev_priv->drm,
4947 		drm_encoder_init(&dev_priv->drm, &encoder->base, &intel_ddi_funcs,
4955 		drm_encoder_init(&dev_priv->drm, &encoder->base, &intel_ddi_funcs,
4965 		drm_encoder_init(&dev_priv->drm, &encoder->base, &intel_ddi_funcs,
4973 		drm_encoder_init(&dev_priv->drm, &encoder->base, &intel_ddi_funcs,
5140 			drm_dbg_kms(&dev_priv->drm,
5157 	drm_WARN_ON(&dev_priv->drm, port > PORT_I);