Lines Matching defs:owned_lane_mask
434 u8 owned_lane_mask;
442 owned_lane_mask = intel_cx0_get_owned_lane_mask(encoder);
453 intel_cx0_rmw(encoder, owned_lane_mask, PHY_C10_VDR_CONTROL(1),
455 intel_cx0_rmw(encoder, owned_lane_mask, PHY_C10_VDR_CMN(3),
459 intel_cx0_rmw(encoder, owned_lane_mask, PHY_C10_VDR_TX(1),
471 if (!(lane_mask & owned_lane_mask))
489 intel_cx0_rmw(encoder, owned_lane_mask, PHY_C10_VDR_OVRD,
494 intel_cx0_rmw(encoder, owned_lane_mask, PHY_C10_VDR_CONTROL(1),
2598 u8 owned_lane_mask = intel_cx0_get_owned_lane_mask(encoder);
2600 u32 lane_pipe_reset = owned_lane_mask == INTEL_CX0_BOTH_LANES
2603 u32 lane_phy_current_status = owned_lane_mask == INTEL_CX0_BOTH_LANES
2625 intel_cx0_get_pclk_refclk_request(owned_lane_mask),
2629 intel_cx0_get_pclk_refclk_ack(owned_lane_mask),
2655 u8 owned_lane_mask = intel_cx0_get_owned_lane_mask(encoder);
2658 intel_cx0_rmw(encoder, owned_lane_mask,
2677 if (!(owned_lane_mask & lane_mask))
2687 intel_cx0_rmw(encoder, owned_lane_mask,