Lines Matching refs:crtc
37 static void assert_vblank_disabled(struct drm_crtc *crtc)
39 struct drm_i915_private *i915 = to_i915(crtc->dev);
41 if (I915_STATE_WARN(i915, drm_crtc_vblank_get(crtc) == 0,
43 crtc->base.id, crtc->name))
44 drm_crtc_vblank_put(crtc);
55 struct intel_crtc *crtc;
57 for_each_intel_crtc(&i915->drm, crtc) {
58 if (crtc->pipe == pipe)
59 return crtc;
65 void intel_crtc_wait_for_next_vblank(struct intel_crtc *crtc)
67 drm_crtc_wait_one_vblank(&crtc->base);
73 struct intel_crtc *crtc = intel_crtc_for_pipe(i915, pipe);
75 if (crtc->active)
76 intel_crtc_wait_for_next_vblank(crtc);
79 u32 intel_crtc_get_vblank_counter(struct intel_crtc *crtc)
81 struct drm_device *dev = crtc->base.dev;
82 struct drm_vblank_crtc *vblank = &dev->vblank[drm_crtc_index(&crtc->base)];
84 if (!crtc->active)
88 return (u32)drm_crtc_accurate_vblank_count(&crtc->base);
90 return crtc->base.funcs->get_vblank_counter(&crtc->base);
95 struct drm_i915_private *dev_priv = to_i915(crtc_state->uapi.crtc->dev);
125 struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
127 assert_vblank_disabled(&crtc->base);
128 drm_crtc_set_max_vblank_count(&crtc->base,
130 drm_crtc_vblank_on(&crtc->base);
137 trace_intel_pipe_enable(crtc);
142 struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
149 trace_intel_pipe_disable(crtc);
151 drm_crtc_vblank_off(&crtc->base);
152 assert_vblank_disabled(&crtc->base);
155 struct intel_crtc_state *intel_crtc_state_alloc(struct intel_crtc *crtc)
162 intel_crtc_state_reset(crtc_state, crtc);
168 struct intel_crtc *crtc)
172 __drm_atomic_helper_crtc_state_reset(&crtc_state->uapi, &crtc->base);
185 struct intel_crtc *crtc;
187 crtc = kzalloc(sizeof(*crtc), GFP_KERNEL);
188 if (!crtc)
191 crtc_state = intel_crtc_state_alloc(crtc);
193 kfree(crtc);
197 crtc->base.state = &crtc_state->uapi;
198 crtc->config = crtc_state;
200 return crtc;
203 static void intel_crtc_free(struct intel_crtc *crtc)
205 intel_crtc_destroy_state(&crtc->base, crtc->base.state);
206 kfree(crtc);
211 struct intel_crtc *crtc = to_intel_crtc(_crtc);
213 cpu_latency_qos_remove_request(&crtc->vblank_pm_qos);
215 drm_crtc_cleanup(&crtc->base);
216 kfree(crtc);
219 static int intel_crtc_late_register(struct drm_crtc *crtc)
221 intel_crtc_debugfs_add(to_intel_crtc(crtc));
303 struct intel_crtc *crtc;
306 crtc = intel_crtc_alloc();
307 if (IS_ERR(crtc))
308 return PTR_ERR(crtc);
310 crtc->pipe = pipe;
311 crtc->num_scalers = DISPLAY_RUNTIME_INFO(dev_priv)->num_scalers[pipe];
322 crtc->plane_ids_mask |= BIT(primary->id);
324 intel_init_fifo_underrun_reporting(dev_priv, crtc, false);
338 crtc->plane_ids_mask |= BIT(plane->id);
346 crtc->plane_ids_mask |= BIT(cursor->id);
367 ret = drm_crtc_init_with_planes(&dev_priv->drm, &crtc->base,
374 drm_crtc_create_scaling_filter_property(&crtc->base,
378 intel_color_crtc_init(crtc);
379 intel_drrs_crtc_init(crtc);
380 intel_crtc_crc_init(crtc);
382 cpu_latency_qos_add_request(&crtc->vblank_pm_qos, PM_QOS_DEFAULT_VALUE);
384 drm_WARN_ON(&dev_priv->drm, drm_crtc_index(&crtc->base) != crtc->pipe);
389 intel_crtc_free(crtc);
408 struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
410 trace_intel_crtc_vblank_work_start(crtc);
415 spin_lock_irq(&crtc->base.dev->event_lock);
416 drm_crtc_send_vblank_event(&crtc->base, crtc_state->uapi.event);
418 spin_unlock_irq(&crtc->base.dev->event_lock);
421 trace_intel_crtc_vblank_work_end(crtc);
426 struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
428 drm_vblank_work_init(&crtc_state->vblank_work, &crtc->base,
434 cpu_latency_qos_update_request(&crtc->vblank_pm_qos, 0);
440 struct intel_crtc *crtc;
443 for_each_new_intel_crtc_in_state(state, crtc, crtc_state, i) {
448 cpu_latency_qos_update_request(&crtc->vblank_pm_qos,
467 * @crtc: the crtc
478 struct intel_crtc *crtc)
480 struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
482 intel_atomic_get_old_crtc_state(state, crtc);
484 intel_atomic_get_new_crtc_state(state, crtc);
491 spin_lock_irq(&crtc->base.dev->event_lock);
493 crtc->flip_done_event = new_crtc_state->uapi.event;
494 spin_unlock_irq(&crtc->base.dev->event_lock);
505 if (drm_WARN_ON(&dev_priv->drm, drm_crtc_vblank_get(&crtc->base)))
517 crtc->debug.min_vbl = evade.min;
518 crtc->debug.max_vbl = evade.max;
519 trace_intel_pipe_update_start(crtc);
523 drm_crtc_vblank_put(&crtc->base);
525 crtc->debug.scanline_start = scanline;
526 crtc->debug.start_vbl_time = ktime_get();
527 crtc->debug.start_vbl_count = intel_crtc_get_vblank_counter(crtc);
529 trace_intel_pipe_update_vblank_evaded(crtc);
537 static void dbg_vblank_evade(struct intel_crtc *crtc, ktime_t end)
539 u64 delta = ktime_to_ns(ktime_sub(end, crtc->debug.start_vbl_time));
543 if (h >= ARRAY_SIZE(crtc->debug.vbl.times))
544 h = ARRAY_SIZE(crtc->debug.vbl.times) - 1;
545 crtc->debug.vbl.times[h]++;
547 crtc->debug.vbl.sum += delta;
548 if (!crtc->debug.vbl.min || delta < crtc->debug.vbl.min)
549 crtc->debug.vbl.min = delta;
550 if (delta > crtc->debug.vbl.max)
551 crtc->debug.vbl.max = delta;
554 drm_dbg_kms(crtc->base.dev,
556 pipe_name(crtc->pipe),
559 crtc->debug.vbl.over++;
563 static void dbg_vblank_evade(struct intel_crtc *crtc, ktime_t end) {}
569 * @crtc: the crtc
576 struct intel_crtc *crtc)
579 intel_atomic_get_new_crtc_state(state, crtc);
580 enum pipe pipe = crtc->pipe;
581 int scanline_end = intel_get_crtc_scanline(crtc);
582 u32 end_vbl_count = intel_crtc_get_vblank_counter(crtc);
584 struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
589 trace_intel_pipe_update_end(crtc, end_vbl_count, scanline_end);
605 drm_crtc_accurate_vblank_count(&crtc->base) + 1,
609 drm_crtc_vblank_get(&crtc->base) != 0);
611 spin_lock(&crtc->base.dev->event_lock);
612 drm_crtc_arm_vblank_event(&crtc->base,
614 spin_unlock(&crtc->base.dev->event_lock);
640 if (crtc->debug.start_vbl_count &&
641 crtc->debug.start_vbl_count != end_vbl_count) {
644 pipe_name(pipe), crtc->debug.start_vbl_count,
647 crtc->debug.start_vbl_time),
648 crtc->debug.min_vbl, crtc->debug.max_vbl,
649 crtc->debug.scanline_start, scanline_end);
652 dbg_vblank_evade(crtc, end_vbl_time);