Lines Matching refs:lanes
91 u32 lanes;
333 u32 lanes)
340 val = (lanes - 1) | (PHY_STOP_WAIT_TIME << 8);
366 u32 lanes)
373 dsi_set_phy_timer(base, phy, lanes);
397 for (i = 0; i < lanes; i++) {
550 dphy_req_kHz = mode->clock * bpp / dsi->lanes;
557 dsi_set_mipi_phy(base, phy, dsi->lanes);
568 DRM_DEBUG_DRIVER("lanes=%d, pixel_clk=%d kHz, bytes_freq=%d kHz\n",
569 dsi->lanes, mode->clock, phy->lane_byte_clk_kHz);
620 req_kHz = mode->clock * bpp / dsi->lanes;
632 if (mode->clock/dsi->lanes == lane_byte_clk_kHz/3) {
732 if (mdsi->lanes < 1 || mdsi->lanes > 4) {
737 dsi->lanes = mdsi->lanes;