Lines Matching refs:buf_id
607 static void gsc_src_set_buf_seq(struct gsc_context *ctx, u32 buf_id,
612 u32 mask = 0x00000001 << buf_id;
619 cfg |= masked << buf_id;
625 static void gsc_src_set_addr(struct gsc_context *ctx, u32 buf_id,
629 gsc_write(buf->dma_addr[0], GSC_IN_BASE_ADDR_Y(buf_id));
630 gsc_write(buf->dma_addr[1], GSC_IN_BASE_ADDR_CB(buf_id));
631 gsc_write(buf->dma_addr[2], GSC_IN_BASE_ADDR_CR(buf_id));
633 gsc_src_set_buf_seq(ctx, buf_id, true);
924 static void gsc_dst_set_buf_seq(struct gsc_context *ctx, u32 buf_id,
929 u32 mask = 0x00000001 << buf_id;
936 cfg |= masked << buf_id;
951 u32 buf_id, struct exynos_drm_ipp_buffer *buf)
954 gsc_write(buf->dma_addr[0], GSC_OUT_BASE_ADDR_Y(buf_id));
955 gsc_write(buf->dma_addr[1], GSC_OUT_BASE_ADDR_CB(buf_id));
956 gsc_write(buf->dma_addr[2], GSC_OUT_BASE_ADDR_CR(buf_id));
958 gsc_dst_set_buf_seq(ctx, buf_id, true);
964 u32 buf_id = GSC_MAX_SRC;
973 buf_id = i;
978 DRM_DEV_DEBUG_KMS(ctx->dev, "cfg[0x%x]curr_index[%d]buf_id[%d]\n", cfg,
979 curr_index, buf_id);
981 if (buf_id == GSC_MAX_SRC) {
986 gsc_src_set_buf_seq(ctx, buf_id, false);
988 return buf_id;
994 u32 buf_id = GSC_MAX_DST;
1003 buf_id = i;
1008 if (buf_id == GSC_MAX_DST) {
1013 gsc_dst_set_buf_seq(ctx, buf_id, false);
1015 DRM_DEV_DEBUG_KMS(ctx->dev, "cfg[0x%x]curr_index[%d]buf_id[%d]\n", cfg,
1016 curr_index, buf_id);
1018 return buf_id;