drm/exynos/exynos7_drm_decon.c

86 	struct decon_context *ctx = crtc->ctx;
88 	if (ctx->suspended)
91 	atomic_set(&ctx->wait_vsync_event, 1);
97 	if (!wait_event_timeout(ctx->wait_vsync_queue,
98 				!atomic_read(&ctx->wait_vsync_event),
100 		DRM_DEV_DEBUG_KMS(ctx->dev, "vblank wait timed out.\n");
105 	struct decon_context *ctx = crtc->ctx;
110 		u32 val = readl(ctx->regs + WINCON(win));
114 			writel(val, ctx->regs + WINCON(win));
121 		decon_wait_for_vblank(ctx->crtc);
124 static int decon_ctx_initialize(struct decon_context *ctx,
127 	ctx->drm_dev = drm_dev;
129 	decon_clear_channels(ctx->crtc);
131 	return exynos_drm_register_dma(drm_dev, ctx->dev, &ctx->dma_priv);
134 static void decon_ctx_remove(struct decon_context *ctx)
137 	exynos_drm_unregister_dma(ctx->drm_dev, ctx->dev, &ctx->dma_priv);
140 static u32 decon_calc_clkdiv(struct decon_context *ctx,
147 	clkdiv = DIV_ROUND_UP(clk_get_rate(ctx->vclk), ideal_clk);
154 	struct decon_context *ctx = crtc->ctx;
158 	if (ctx->suspended)
165 	if (!ctx->i80_if) {
173 		writel(val, ctx->regs + VIDTCON0);
176 		writel(val, ctx->regs + VIDTCON1);
185 		writel(val, ctx->regs + VIDTCON2);
188 		writel(val, ctx->regs + VIDTCON3);
194 	writel(val, ctx->regs + VIDTCON4);
196 	writel(mode->vdisplay - 1, ctx->regs + LINECNT_OP_THRESHOLD);
203 	writel(val, ctx->regs + VIDCON0);
205 	clkdiv = decon_calc_clkdiv(ctx, mode);
208 		writel(val, ctx->regs + VCLKCON1);
209 		writel(val, ctx->regs + VCLKCON2);
212 	val = readl(ctx->regs + DECON_UPDATE);
214 	writel(val, ctx->regs + DECON_UPDATE);
219 	struct decon_context *ctx = crtc->ctx;
222 	if (ctx->suspended)
225 	if (!test_and_set_bit(0, &ctx->irq_flags)) {
226 		val = readl(ctx->regs + VIDINTCON0);
230 		if (!ctx->i80_if) {
236 		writel(val, ctx->regs + VIDINTCON0);
244 	struct decon_context *ctx = crtc->ctx;
247 	if (ctx->suspended)
250 	if (test_and_clear_bit(0, &ctx->irq_flags)) {
251 		val = readl(ctx->regs + VIDINTCON0);
254 		if (!ctx->i80_if)
257 		writel(val, ctx->regs + VIDINTCON0);
261 static void decon_win_set_pixfmt(struct decon_context *ctx, unsigned int win,
267 	val = readl(ctx->regs + WINCON(win));
314 	DRM_DEV_DEBUG_KMS(ctx->dev, "cpp = %d\n", fb->format->cpp[0]);
330 	writel(val, ctx->regs + WINCON(win));
333 static void decon_win_set_colkey(struct decon_context *ctx, unsigned int win)
342 	writel(keycon0, ctx->regs + WKEYCON0_BASE(win));
343 	writel(keycon1, ctx->regs + WKEYCON1_BASE(win));
349  * @ctx: display and enhancement controller context
353 static void decon_shadow_protect_win(struct decon_context *ctx,
360 	val = readl(ctx->regs + SHADOWCON);
365 	writel(val, ctx->regs + SHADOWCON);
370 	struct decon_context *ctx = crtc->ctx;
373 	if (ctx->suspended)
377 		decon_shadow_protect_win(ctx, i, true);
385 	struct decon_context *ctx = crtc->ctx;
395 	if (ctx->suspended)
410 	writel(val, ctx->regs + VIDW_BUF_START(win));
415 	writel(fb->width + padding, ctx->regs + VIDW_WHOLE_X(win));
416 	writel(fb->height, ctx->regs + VIDW_WHOLE_Y(win));
419 	writel(state->src.x, ctx->regs + VIDW_OFFSET_X(win));
420 	writel(state->src.y, ctx->regs + VIDW_OFFSET_Y(win));
422 	DRM_DEV_DEBUG_KMS(ctx->dev, "start addr = 0x%lx\n",
424 	DRM_DEV_DEBUG_KMS(ctx->dev, "ovl_width = %d, ovl_height = %d\n",
429 	writel(val, ctx->regs + VIDOSD_A(win));
440 	writel(val, ctx->regs + VIDOSD_B(win));
442 	DRM_DEV_DEBUG_KMS(ctx->dev, "osd pos: tx = %d, ty = %d, bx = %d, by = %d\n",
450 	writel(alpha, ctx->regs + VIDOSD_C(win));
456 	writel(alpha, ctx->regs + VIDOSD_D(win));
458 	decon_win_set_pixfmt(ctx, win, fb);
462 		decon_win_set_colkey(ctx, win);
465 	val = readl(ctx->regs + WINCON(win));
468 	writel(val, ctx->regs + WINCON(win));
471 	decon_shadow_protect_win(ctx, win, false);
473 	val = readl(ctx->regs + DECON_UPDATE);
475 	writel(val, ctx->regs + DECON_UPDATE);
481 	struct decon_context *ctx = crtc->ctx;
485 	if (ctx->suspended)
489 	decon_shadow_protect_win(ctx, win, true);
492 	val = readl(ctx->regs + WINCON(win));
494 	writel(val, ctx->regs + WINCON(win));
496 	val = readl(ctx->regs + DECON_UPDATE);
498 	writel(val, ctx->regs + DECON_UPDATE);
503 	struct decon_context *ctx = crtc->ctx;
506 	if (ctx->suspended)
510 		decon_shadow_protect_win(ctx, i, false);
514 static void decon_init(struct decon_context *ctx)
518 	writel(VIDCON0_SWRESET, ctx->regs + VIDCON0);
521 	if (!ctx->i80_if)
523 	writel(val, ctx->regs + VIDOUTCON0);
525 	writel(VCLKCON0_CLKVALUP | VCLKCON0_VCLKFREE, ctx->regs + VCLKCON0);
527 	if (!ctx->i80_if)
528 		writel(VIDCON1_VCLK_HOLD, ctx->regs + VIDCON1(0));
533 	struct decon_context *ctx = crtc->ctx;
536 	if (!ctx->suspended)
539 	ret = pm_runtime_resume_and_get(ctx->dev);
541 		DRM_DEV_ERROR(ctx->dev, "failed to enable DECON device.\n");
545 	decon_init(ctx);
548 	if (test_and_clear_bit(0, &ctx->irq_flags))
549 		decon_enable_vblank(ctx->crtc);
551 	decon_commit(ctx->crtc);
553 	ctx->suspended = false;
558 	struct decon_context *ctx = crtc->ctx;
561 	if (ctx->suspended)
570 		decon_disable_plane(crtc, &ctx->planes[i]);
572 	pm_runtime_put_sync(ctx->dev);
574 	ctx->suspended = true;
591 	struct decon_context *ctx = (struct decon_context *)dev_id;
594 	val = readl(ctx->regs + VIDINTCON1);
596 	clear_bit = ctx->i80_if ? VIDINTCON1_INT_I80 : VIDINTCON1_INT_FRAME;
598 		writel(clear_bit, ctx->regs + VIDINTCON1);
601 	if (!ctx->drm_dev)
604 	if (!ctx->i80_if) {
605 		drm_crtc_handle_vblank(&ctx->crtc->base);
608 		if (atomic_read(&ctx->wait_vsync_event)) {
609 			atomic_set(&ctx->wait_vsync_event, 0);
610 			wake_up(&ctx->wait_vsync_queue);
619 	struct decon_context *ctx = dev_get_drvdata(dev);
625 	ret = decon_ctx_initialize(ctx, drm_dev);
632 		ctx->configs[i].pixel_formats = decon_formats;
633 		ctx->configs[i].num_pixel_formats = ARRAY_SIZE(decon_formats);
634 		ctx->configs[i].zpos = i;
635 		ctx->configs[i].type = decon_win_types[i];
637 		ret = exynos_plane_init(drm_dev, &ctx->planes[i], i,
638 					&ctx->configs[i]);
643 	exynos_plane = &ctx->planes[DEFAULT_WIN];
644 	ctx->crtc = exynos_drm_crtc_create(drm_dev, &exynos_plane->base,
645 			EXYNOS_DISPLAY_TYPE_LCD, &decon_crtc_ops, ctx);
646 	if (IS_ERR(ctx->crtc)) {
647 		decon_ctx_remove(ctx);
648 		return PTR_ERR(ctx->crtc);
651 	if (ctx->encoder)
652 		exynos_dpi_bind(drm_dev, ctx->encoder);
661 	struct decon_context *ctx = dev_get_drvdata(dev);
663 	decon_atomic_disable(ctx->crtc);
665 	if (ctx->encoder)
666 		exynos_dpi_remove(ctx->encoder);
668 	decon_ctx_remove(ctx);
679 	struct decon_context *ctx;
686 	ctx = devm_kzalloc(dev, sizeof(*ctx), GFP_KERNEL);
687 	if (!ctx)
690 	ctx->dev = dev;
691 	ctx->suspended = true;
695 		ctx->i80_if = true;
698 	ctx->regs = of_iomap(dev->of_node, 0);
699 	if (!ctx->regs)
702 	ctx->pclk = devm_clk_get(dev, "pclk_decon0");
703 	if (IS_ERR(ctx->pclk)) {
705 		ret = PTR_ERR(ctx->pclk);
709 	ctx->aclk = devm_clk_get(dev, "aclk_decon0");
710 	if (IS_ERR(ctx->aclk)) {
712 		ret = PTR_ERR(ctx->aclk);
716 	ctx->eclk = devm_clk_get(dev, "decon0_eclk");
717 	if (IS_ERR(ctx->eclk)) {
719 		ret = PTR_ERR(ctx->eclk);
723 	ctx->vclk = devm_clk_get(dev, "decon0_vclk");
724 	if (IS_ERR(ctx->vclk)) {
726 		ret = PTR_ERR(ctx->vclk);
730 	ret =  platform_get_irq_byname(pdev, ctx->i80_if ? "lcd_sys" : "vsync");
734 	ret = devm_request_irq(dev, ret, decon_irq_handler, 0, "drm_decon", ctx);
740 	init_waitqueue_head(&ctx->wait_vsync_queue);
741 	atomic_set(&ctx->wait_vsync_event, 0);
743 	platform_set_drvdata(pdev, ctx);
745 	ctx->encoder = exynos_dpi_probe(dev);
746 	if (IS_ERR(ctx->encoder)) {
747 		ret = PTR_ERR(ctx->encoder);
763 	iounmap(ctx->regs);
770 	struct decon_context *ctx = dev_get_drvdata(&pdev->dev);
774 	iounmap(ctx->regs);
781 	struct decon_context *ctx = dev_get_drvdata(dev);
783 	clk_disable_unprepare(ctx->vclk);
784 	clk_disable_unprepare(ctx->eclk);
785 	clk_disable_unprepare(ctx->aclk);
786 	clk_disable_unprepare(ctx->pclk);
793 	struct decon_context *ctx = dev_get_drvdata(dev);
796 	ret = clk_prepare_enable(ctx->pclk);
803 	ret = clk_prepare_enable(ctx->aclk);
810 	ret = clk_prepare_enable(ctx->eclk);
817 	ret = clk_prepare_enable(ctx->vclk);
827 	clk_disable_unprepare(ctx->eclk);
829 	clk_disable_unprepare(ctx->aclk);
831 	clk_disable_unprepare(ctx->pclk);