gpu/drm/drm_mipi_dbi.c

14 #include <linux/spi/spi.h>
811  * @spi: SPI device
818 u32 mipi_dbi_spi_cmd_max_speed(struct spi_device *spi, size_t len)
823 	return min_t(u32, 10000000, spi->max_speed_hz);
860 	struct spi_device *spi = dbi->spi;
874 	tr.speed_hz = mipi_dbi_spi_cmd_max_speed(spi, len);
887 		return spi_sync(spi, &m);
964 		ret = spi_sync(spi, &m);
976 	struct spi_device *spi = dbi->spi;
987 	if (!spi_is_bpw_supported(spi, 9))
990 	tr.speed_hz = mipi_dbi_spi_cmd_max_speed(spi, len);
1027 		ret = spi_sync(spi, &m);
1038 	struct spi_device *spi = dbi->spi;
1040 			     spi->max_speed_hz / 2);
1061 	if (!spi_is_bpw_supported(spi, 9)) {
1066 		dev_err(&spi->dev,
1080 	ret = spi_sync(spi, &m);
1111 	struct spi_device *spi = dbi->spi;
1113 			     spi->max_speed_hz / 2);
1149 	spi_bus_lock(spi->controller);
1153 	ret = spi_sync_locked(spi, &m);
1154 	spi_bus_unlock(spi->controller);
1178 	struct spi_device *spi = dbi->spi;
1188 	spi_bus_lock(spi->controller);
1190 	speed_hz = mipi_dbi_spi_cmd_max_speed(spi, 1);
1191 	ret = mipi_dbi_spi_transfer(spi, speed_hz, 8, cmd, 1);
1192 	spi_bus_unlock(spi->controller);
1199 	spi_bus_lock(spi->controller);
1201 	speed_hz = mipi_dbi_spi_cmd_max_speed(spi, num);
1202 	ret = mipi_dbi_spi_transfer(spi, speed_hz, bpw, par, num);
1203 	spi_bus_unlock(spi->controller);
1210  * @spi: SPI device
1230 int mipi_dbi_spi_init(struct spi_device *spi, struct mipi_dbi *dbi,
1233 	struct device *dev = &spi->dev;
1254 	dbi->spi = spi;
1260 		if (mipi_dbi_machine_little_endian() && !spi_is_bpw_supported(spi, 16))
1272 	DRM_DEBUG_DRIVER("SPI speed: %uMHz\n", spi->max_speed_hz / 1000000);
1280  * @spi: SPI device
1293 int mipi_dbi_spi_transfer(struct spi_device *spi, u32 speed_hz,
1296 	size_t max_chunk = spi_max_transfer_size(spi);
1322 		ret = spi_sync_locked(spi, &m);