drm/bridge/tc358775.c

283 	struct tc_data *tc = bridge_to_tc(bridge);
284 	struct device *dev = &tc->dsi->dev;
287 	ret = regulator_enable(tc->vddio);
292 	ret = regulator_enable(tc->vdd);
297 	gpiod_set_value(tc->stby_gpio, 0);
300 	gpiod_set_value(tc->reset_gpio, 0);
306 	struct tc_data *tc = bridge_to_tc(bridge);
307 	struct device *dev = &tc->dsi->dev;
310 	gpiod_set_value(tc->reset_gpio, 1);
313 	gpiod_set_value(tc->stby_gpio, 1);
316 	ret = regulator_disable(tc->vdd);
321 	ret = regulator_disable(tc->vddio);
378 	struct tc_data *tc = bridge_to_tc(bridge);
404 	d2l_read(tc->i2c, IDREG, &val);
406 	dev_info(tc->dev, "DSI2LVDS Chip ID.%02x Revision ID. %02x **\n",
409 	d2l_write(tc->i2c, SYSRST, SYS_RST_REG | SYS_RST_DSIRX | SYS_RST_BM |
413 	d2l_write(tc->i2c, PPI_TX_RX_TA, TTA_GET | TTA_SURE);
414 	d2l_write(tc->i2c, PPI_LPTXTIMECNT, LPX_PERIOD);
415 	d2l_write(tc->i2c, PPI_D0S_CLRSIPOCOUNT, 3);
416 	d2l_write(tc->i2c, PPI_D1S_CLRSIPOCOUNT, 3);
417 	d2l_write(tc->i2c, PPI_D2S_CLRSIPOCOUNT, 3);
418 	d2l_write(tc->i2c, PPI_D3S_CLRSIPOCOUNT, 3);
420 	val = ((L0EN << tc->num_dsi_lanes) - L0EN) | DSI_CLEN_BIT;
421 	d2l_write(tc->i2c, PPI_LANEENABLE, val);
422 	d2l_write(tc->i2c, DSI_LANEENABLE, val);
424 	d2l_write(tc->i2c, PPI_STARTPPI, PPI_START_FUNCTION);
425 	d2l_write(tc->i2c, DSI_STARTDSI, DSI_RX_START);
427 	if (tc->bpc == 8)
432 	dsiclk = mode->crtc_clock * 3 * tc->bpc / tc->num_dsi_lanes / 1000;
433 	clkdiv = dsiclk / (tc->lvds_link == DUAL_LINK ? DIVIDE_BY_6 : DIVIDE_BY_3);
435 	t1 = hactive * (tc->bpc * 3 / 8) / tc->num_dsi_lanes;
437 	t3 = ((t2 * byteclk) / 100) - (hactive * (tc->bpc * 3 / 8) /
438 		tc->num_dsi_lanes);
443 	d2l_write(tc->i2c, VPCTRL, val);
445 	d2l_write(tc->i2c, HTIM1, htime1);
446 	d2l_write(tc->i2c, VTIM1, vtime1);
447 	d2l_write(tc->i2c, HTIM2, htime2);
448 	d2l_write(tc->i2c, VTIM2, vtime2);
450 	d2l_write(tc->i2c, VFUEN, VFUEN_EN);
451 	d2l_write(tc->i2c, SYSRST, SYS_RST_LCD);
452 	d2l_write(tc->i2c, LVPHY0, LV_PHY0_PRBS_ON(4) | LV_PHY0_ND(6));
454 	dev_dbg(tc->dev, "bus_formats %04x bpc %d\n",
456 		tc->bpc);
464 		d2l_write(tc->i2c, LV_MX0003, LV_MX(LVI_R0, LVI_R1, LVI_R2, LVI_R3));
465 		d2l_write(tc->i2c, LV_MX0407, LV_MX(LVI_R4, LVI_R7, LVI_R5, LVI_G0));
466 		d2l_write(tc->i2c, LV_MX0811, LV_MX(LVI_G1, LVI_G2, LVI_G6, LVI_G7));
467 		d2l_write(tc->i2c, LV_MX1215, LV_MX(LVI_G3, LVI_G4, LVI_G5, LVI_B0));
468 		d2l_write(tc->i2c, LV_MX1619, LV_MX(LVI_B6, LVI_B7, LVI_B1, LVI_B2));
469 		d2l_write(tc->i2c, LV_MX2023, LV_MX(LVI_B3, LVI_B4, LVI_B5, LVI_L0));
470 		d2l_write(tc->i2c, LV_MX2427, LV_MX(LVI_HS, LVI_VS, LVI_DE, LVI_R6));
472 		d2l_write(tc->i2c, LV_MX0003, LV_MX(LVI_R0, LVI_R1, LVI_R2, LVI_R3));
473 		d2l_write(tc->i2c, LV_MX0407, LV_MX(LVI_R4, LVI_L0, LVI_R5, LVI_G0));
474 		d2l_write(tc->i2c, LV_MX0811, LV_MX(LVI_G1, LVI_G2, LVI_L0, LVI_L0));
475 		d2l_write(tc->i2c, LV_MX1215, LV_MX(LVI_G3, LVI_G4, LVI_G5, LVI_B0));
476 		d2l_write(tc->i2c, LV_MX1619, LV_MX(LVI_L0, LVI_L0, LVI_B1, LVI_B2));
477 		d2l_write(tc->i2c, LV_MX2023, LV_MX(LVI_B3, LVI_B4, LVI_B5, LVI_L0));
478 		d2l_write(tc->i2c, LV_MX2427, LV_MX(LVI_HS, LVI_VS, LVI_DE, LVI_L0));
481 	d2l_write(tc->i2c, VFUEN, VFUEN_EN);
484 	if (tc->lvds_link == DUAL_LINK) {
490 	d2l_write(tc->i2c, LVCFG, val);
498 	struct tc_data *tc = bridge_to_tc(bridge);
504 	if ((mode->clock > 135000 && tc->lvds_link == SINGLE_LINK) ||
505 	    (mode->clock > 270000 && tc->lvds_link == DUAL_LINK))
512 		tc->bpc = 8;
516 		tc->bpc = 6;
519 		dev_warn(tc->dev,
528 static int tc358775_parse_dt(struct device_node *np, struct tc_data *tc)
539 	endpoint = of_graph_get_endpoint_by_regs(tc->dev->of_node,
555 	tc->num_dsi_lanes = dsi_lanes;
557 	tc->host_node = of_graph_get_remote_node(np, 0, 0);
558 	if (!tc->host_node)
561 	of_node_put(tc->host_node);
563 	tc->lvds_link = SINGLE_LINK;
564 	endpoint = of_graph_get_endpoint_by_regs(tc->dev->of_node,
572 				tc->lvds_link = DUAL_LINK;
577 	dev_dbg(tc->dev, "no.of dsi lanes: %d\n", tc->num_dsi_lanes);
578 	dev_dbg(tc->dev, "operating in %d-link mode\n",	tc->lvds_link);
586 	struct tc_data *tc = bridge_to_tc(bridge);
589 	return drm_bridge_attach(bridge->encoder, tc->panel_bridge,
590 				 &tc->bridge, flags);
601 static int tc_attach_host(struct tc_data *tc)
603 	struct device *dev = &tc->i2c->dev;
612 	host = of_find_mipi_dsi_host_by_node(tc->host_node);
624 	tc->dsi = dsi;
626 	dsi->lanes = tc->num_dsi_lanes;
642 	struct tc_data *tc;
645 	tc = devm_kzalloc(dev, sizeof(*tc), GFP_KERNEL);
646 	if (!tc)
649 	tc->dev = dev;
650 	tc->i2c = client;
652 	tc->panel_bridge = devm_drm_of_get_bridge(dev, dev->of_node,
654 	if (IS_ERR(tc->panel_bridge))
655 		return PTR_ERR(tc->panel_bridge);
657 	ret = tc358775_parse_dt(dev->of_node, tc);
661 	tc->vddio = devm_regulator_get(dev, "vddio-supply");
662 	if (IS_ERR(tc->vddio)) {
663 		ret = PTR_ERR(tc->vddio);
668 	tc->vdd = devm_regulator_get(dev, "vdd-supply");
669 	if (IS_ERR(tc->vdd)) {
670 		ret = PTR_ERR(tc->vdd);
675 	tc->stby_gpio = devm_gpiod_get(dev, "stby", GPIOD_OUT_HIGH);
676 	if (IS_ERR(tc->stby_gpio)) {
677 		ret = PTR_ERR(tc->stby_gpio);
682 	tc->reset_gpio = devm_gpiod_get(dev, "reset", GPIOD_OUT_HIGH);
683 	if (IS_ERR(tc->reset_gpio)) {
684 		ret = PTR_ERR(tc->reset_gpio);
689 	tc->bridge.funcs = &tc_bridge_funcs;
690 	tc->bridge.of_node = dev->of_node;
691 	drm_bridge_add(&tc->bridge);
693 	i2c_set_clientdata(client, tc);
695 	ret = tc_attach_host(tc);
702 	drm_bridge_remove(&tc->bridge);
708 	struct tc_data *tc = i2c_get_clientdata(client);
710 	drm_bridge_remove(&tc->bridge);