Lines Matching defs:pl

39 static void imx8qxp_pixel_link_enable_mst_en(struct imx8qxp_pixel_link *pl)
43 ret = imx_sc_misc_set_control(pl->ipc_handle, pl->sink_rsc,
44 pl->mst_en_ctrl, true);
46 DRM_DEV_ERROR(pl->dev,
48 pl->dc_id, pl->stream_id, ret);
51 static void imx8qxp_pixel_link_enable_mst_vld(struct imx8qxp_pixel_link *pl)
55 ret = imx_sc_misc_set_control(pl->ipc_handle, pl->sink_rsc,
56 pl->mst_vld_ctrl, true);
58 DRM_DEV_ERROR(pl->dev,
60 pl->dc_id, pl->stream_id, ret);
63 static void imx8qxp_pixel_link_enable_sync(struct imx8qxp_pixel_link *pl)
67 ret = imx_sc_misc_set_control(pl->ipc_handle, pl->sink_rsc,
68 pl->sync_ctrl, true);
70 DRM_DEV_ERROR(pl->dev,
72 pl->dc_id, pl->stream_id, ret);
75 static int imx8qxp_pixel_link_disable_mst_en(struct imx8qxp_pixel_link *pl)
79 ret = imx_sc_misc_set_control(pl->ipc_handle, pl->sink_rsc,
80 pl->mst_en_ctrl, false);
82 DRM_DEV_ERROR(pl->dev,
84 pl->dc_id, pl->stream_id, ret);
89 static int imx8qxp_pixel_link_disable_mst_vld(struct imx8qxp_pixel_link *pl)
93 ret = imx_sc_misc_set_control(pl->ipc_handle, pl->sink_rsc,
94 pl->mst_vld_ctrl, false);
96 DRM_DEV_ERROR(pl->dev,
98 pl->dc_id, pl->stream_id, ret);
103 static int imx8qxp_pixel_link_disable_sync(struct imx8qxp_pixel_link *pl)
107 ret = imx_sc_misc_set_control(pl->ipc_handle, pl->sink_rsc,
108 pl->sync_ctrl, false);
110 DRM_DEV_ERROR(pl->dev,
112 pl->dc_id, pl->stream_id, ret);
117 static void imx8qxp_pixel_link_set_mst_addr(struct imx8qxp_pixel_link *pl)
121 ret = imx_sc_misc_set_control(pl->ipc_handle,
122 pl->sink_rsc, pl->mst_addr_ctrl,
123 pl->mst_addr);
125 DRM_DEV_ERROR(pl->dev,
127 pl->dc_id, pl->stream_id, pl->mst_addr, ret);
133 struct imx8qxp_pixel_link *pl = bridge->driver_private;
136 DRM_DEV_ERROR(pl->dev,
142 DRM_DEV_ERROR(pl->dev, "missing encoder\n");
147 pl->next_bridge, bridge,
156 struct imx8qxp_pixel_link *pl = bridge->driver_private;
158 imx8qxp_pixel_link_set_mst_addr(pl);
165 struct imx8qxp_pixel_link *pl = bridge->driver_private;
167 imx8qxp_pixel_link_enable_mst_en(pl);
168 imx8qxp_pixel_link_enable_mst_vld(pl);
169 imx8qxp_pixel_link_enable_sync(pl);
176 struct imx8qxp_pixel_link *pl = bridge->driver_private;
178 imx8qxp_pixel_link_disable_mst_en(pl);
179 imx8qxp_pixel_link_disable_mst_vld(pl);
180 imx8qxp_pixel_link_disable_sync(pl);
250 static int imx8qxp_pixel_link_disable_all_controls(struct imx8qxp_pixel_link *pl)
254 ret = imx8qxp_pixel_link_disable_mst_en(pl);
258 ret = imx8qxp_pixel_link_disable_mst_vld(pl);
262 return imx8qxp_pixel_link_disable_sync(pl);
266 imx8qxp_pixel_link_find_next_bridge(struct imx8qxp_pixel_link *pl)
268 struct device_node *np = pl->dev->of_node;
292 DRM_DEV_ERROR(pl->dev, "no available output port\n");
302 DRM_DEV_DEBUG(pl->dev,
324 pl->mst_addr = port_id - 1;
331 struct imx8qxp_pixel_link *pl;
336 pl = devm_kzalloc(dev, sizeof(*pl), GFP_KERNEL);
337 if (!pl)
340 ret = imx_scu_get_handle(&pl->ipc_handle);
348 ret = of_property_read_u8(np, "fsl,dc-id", &pl->dc_id);
354 ret = of_property_read_u8(np, "fsl,dc-stream-id", &pl->stream_id);
360 pl->dev = dev;
362 pl->sink_rsc = pl->dc_id ? IMX_SC_R_DC_1 : IMX_SC_R_DC_0;
364 if (pl->stream_id == 0) {
365 pl->mst_addr_ctrl = IMX_SC_C_PXL_LINK_MST1_ADDR;
366 pl->mst_en_ctrl = IMX_SC_C_PXL_LINK_MST1_ENB;
367 pl->mst_vld_ctrl = IMX_SC_C_PXL_LINK_MST1_VLD;
368 pl->sync_ctrl = IMX_SC_C_SYNC_CTRL0;
370 pl->mst_addr_ctrl = IMX_SC_C_PXL_LINK_MST2_ADDR;
371 pl->mst_en_ctrl = IMX_SC_C_PXL_LINK_MST2_ENB;
372 pl->mst_vld_ctrl = IMX_SC_C_PXL_LINK_MST2_VLD;
373 pl->sync_ctrl = IMX_SC_C_SYNC_CTRL1;
377 ret = imx8qxp_pixel_link_disable_all_controls(pl);
381 pl->next_bridge = imx8qxp_pixel_link_find_next_bridge(pl);
382 if (IS_ERR(pl->next_bridge)) {
383 ret = PTR_ERR(pl->next_bridge);
390 platform_set_drvdata(pdev, pl);
392 pl->bridge.driver_private = pl;
393 pl->bridge.funcs = &imx8qxp_pixel_link_bridge_funcs;
394 pl->bridge.of_node = np;
396 drm_bridge_add(&pl->bridge);
403 struct imx8qxp_pixel_link *pl = platform_get_drvdata(pdev);
405 drm_bridge_remove(&pl->bridge);