bridge/analogix/analogix-anx6345.c

63 	u8 dpcd[DP_RECEIVER_CAP_SIZE];
99 	u8 dp_bw, dpcd[2];
134 			       &anx6345->dpcd, DP_RECEIVER_CAP_SIZE);
150 	if (anx6345->dpcd[DP_DPCD_REV] >= 0x11) {
151 		err = drm_dp_dpcd_readb(&anx6345->aux, DP_SET_POWER, &dpcd[0]);
158 		dpcd[0] &= ~DP_SET_POWER_MASK;
159 		dpcd[0] |= DP_SET_POWER_D0;
161 		err = drm_dp_dpcd_writeb(&anx6345->aux, DP_SET_POWER, dpcd[0]);
182 	if (anx6345->dpcd[DP_MAX_DOWNSPREAD] & DP_MAX_DOWNSPREAD_0_5) {
201 	if (drm_dp_enhanced_frame_cap(anx6345->dpcd))
212 	dpcd[0] = dp_bw;
214 			   SP_DP_MAIN_LINK_BW_SET_REG, dpcd[0]);
218 	dpcd[1] = drm_dp_max_lane_count(anx6345->dpcd);
221 			   SP_DP_LANE_COUNT_SET_REG, dpcd[1]);
225 	if (drm_dp_enhanced_frame_cap(anx6345->dpcd))
226 		dpcd[1] |= DP_LANE_COUNT_ENHANCED_FRAME_EN;
228 	err = drm_dp_dpcd_write(&anx6345->aux, DP_LINK_BW_SET, dpcd,
229 				sizeof(dpcd));