swsmu/smu13/yellow_carp_ppt.c

718 						enum smu_clk_type clk_type,
723 	switch (clk_type) {
752 						enum smu_clk_type clk_type,
757 	switch (clk_type) {
781 						enum smu_clk_type clk_type,
787 	if (!clk_table || clk_type >= SMU_CLK_COUNT)
790 	switch (clk_type) {
825 						enum smu_clk_type clk_type)
829 	switch (clk_type) {
854 							enum smu_clk_type clk_type,
863 	if (!yellow_carp_clk_dpm_is_enabled(smu, clk_type)) {
864 		switch (clk_type) {
900 		switch (clk_type) {
922 		if (clk_type != SMU_GFXCLK && clk_type != SMU_SCLK) {
923 			ret = yellow_carp_get_dpm_freq_by_index(smu, clk_type, max_dpm_level, max);
930 		switch (clk_type) {
952 		if (clk_type != SMU_GFXCLK && clk_type != SMU_SCLK) {
953 			ret = yellow_carp_get_dpm_freq_by_index(smu, clk_type, min_dpm_level, min);
964 							enum smu_clk_type clk_type,
974 	if (!yellow_carp_clk_dpm_is_enabled(smu, clk_type))
977 	switch (clk_type) {
1000 	if (clk_type == SMU_VCLK) {
1019 					enum smu_clk_type clk_type)
1024 	switch (clk_type) {
1055 				enum smu_clk_type clk_type, char *buf)
1064 	switch (clk_type) {
1082 		ret = yellow_carp_get_current_clk_freq(smu, clk_type, &cur_value);
1086 		ret = yellow_carp_get_dpm_level_count(smu, clk_type, &count);
1091 			idx = (clk_type == SMU_FCLK || clk_type == SMU_MCLK) ? (count - i - 1) : i;
1092 			ret = yellow_carp_get_dpm_freq_by_index(smu, clk_type, idx, &value);
1102 		clk_limit = yellow_carp_get_umd_pstate_clk_default(smu, clk_type);
1103 		ret = yellow_carp_get_current_clk_freq(smu, clk_type, &cur_value);
1131 				enum smu_clk_type clk_type, uint32_t mask)
1140 	switch (clk_type) {
1145 		ret = yellow_carp_get_dpm_freq_by_index(smu, clk_type, soft_min_level, &min_freq);
1149 		ret = yellow_carp_get_dpm_freq_by_index(smu, clk_type, soft_max_level, &max_freq);
1153 		ret = yellow_carp_set_soft_freq_limited_range(smu, clk_type, min_freq, max_freq);
1168 					enum smu_clk_type clk_type,
1175 	clk_limit = yellow_carp_get_umd_pstate_clk_default(smu, clk_type);
1177 	switch (clk_type) {