swsmu/smu13/smu_v13_0_7_ppt.c

596 		dpm_table->min = dpm_table->dpm_levels[0].value;
620 		dpm_table->min = dpm_table->dpm_levels[0].value;
636 		dpm_table->min = dpm_table->dpm_levels[0].value;
652 		dpm_table->min = dpm_table->dpm_levels[0].value;
668 		dpm_table->min = dpm_table->dpm_levels[0].value;
684 		dpm_table->min = dpm_table->dpm_levels[0].value;
718 		dpm_table->min = dpm_table->dpm_levels[0].value;
890 					     uint32_t *min,
931 	if (min)
932 		*min = dpm_table->min;
1080 					      int32_t *min,
1140 	if (min)
1141 		*min = od_min_setting;
1258 			 *   - level 0 -> min clock freq
1263 			 *   - level 0 -> min clock freq
1621 				dev_info(adev->dev, "Supported indices: [0:min,1:max]\n");
1682 				dev_info(adev->dev, "Supported indices: [0:min,1:max]\n");
2224 	pstate_table->gfxclk_pstate.min = gfx_table->min;
2231 	pstate_table->uclk_pstate.min = mem_table->min;
2234 	pstate_table->socclk_pstate.min = soc_table->min;
2237 	pstate_table->vclk_pstate.min = vclk_table->min;
2240 	pstate_table->dclk_pstate.min = dclk_table->min;
2243 	pstate_table->fclk_pstate.min = fclk_table->min;
2252 	pstate_table->socclk_pstate.standard = soc_table->min;
2253 	pstate_table->vclk_pstate.standard = vclk_table->min;
2254 	pstate_table->dclk_pstate.standard = dclk_table->min;
2255 	pstate_table->fclk_pstate.standard = fclk_table->min;
2277 	*speed = min(*speed * 255 / 100, (uint32_t)255);
2340 			od_percent_lower = le32_to_cpu(powerplay_table->overdrive_table.min[SMU_13_0_7_ODSETTING_POWERPERCENTAGE]);
2343 			od_percent_lower = le32_to_cpu(powerplay_table->overdrive_table.min[SMU_13_0_7_ODSETTING_POWERPERCENTAGE]);