Lines Matching defs:idx
2567 int idx, int offset, uint32_t *val)
2582 param = ((idx & 0xffff) << 16) | (offset & 0xfffc);
2588 int idx, int offset, uint32_t *val, int count)
2596 ret = __smu_v13_0_6_mca_dump_bank(smu, type, idx, offset + (i << 2), &val[i]);
2635 int idx, int reg_idx, uint64_t *val)
2644 ret = smu_v13_0_6_mca_dump_bank(smu, type, idx, reg_idx * 8, data, ARRAY_SIZE(data));
2651 type == AMDGPU_MCA_ERROR_TYPE_UE ? "UE" : "CE", idx, reg_idx, *val);
2657 int idx, struct mca_bank_entry *entry)
2663 ret = mca_bank_read_reg(adev, type, idx, i, &entry->regs[i]);
2668 entry->idx = idx;
3001 enum amdgpu_mca_error_type type, int idx, struct mca_bank_entry *entry)
3003 return mca_get_mca_entry(adev, type, idx, entry);
3077 int idx, int offset, u32 *val)
3092 param = ((idx & 0xffff) << 16) | (offset & 0xfffc);
3098 int idx, int offset, u32 *val, int count)
3106 ret = __smu_v13_0_6_aca_bank_dump(smu, type, idx, offset + (i << 2), &val[i]);
3115 int idx, int reg_idx, u64 *val)
3124 ret = smu_v13_0_6_aca_bank_dump(smu, type, idx, reg_idx * 8, data, ARRAY_SIZE(data));
3131 type == ACA_SMU_TYPE_UE ? "UE" : "CE", idx, reg_idx, *val);
3137 enum aca_smu_type type, int idx, struct aca_bank *bank)
3143 ret = aca_bank_read_reg(adev, type, idx, i, &bank->regs[i]);