Lines Matching refs:uint32_t
34 uint32_t numFractionalBits;
75 uint32_t MmHubPadding[7]; // SMU internal use
113 uint32_t FClk;
114 uint32_t MemClk;
115 uint32_t Voltage;
123 uint32_t DcfClocks[NUM_DCFCLK_DPM_LEVELS];
124 uint32_t DispClocks[NUM_DISPCLK_DPM_LEVELS];
125 uint32_t DppClocks[NUM_DPPCLK_DPM_LEVELS];
126 uint32_t SocClocks[NUM_SOCCLK_DPM_LEVELS];
127 uint32_t VClocks[NUM_VCN_DPM_LEVELS];
128 uint32_t DClocks[NUM_VCN_DPM_LEVELS];
129 uint32_t SocVoltage[NUM_SOC_VOLTAGE_LEVELS];
139 uint32_t MinGfxClk;
140 uint32_t MaxGfxClk;
187 uint32_t ApuPower; //[mW]
188 uint32_t dGpuPower; //[mW]
214 uint32_t MetricsCounter; //Counts the # of metrics table parameter reads per update to the metrics table, i.e. if the metrics table update happens every 1 second, this value could be up to 1000 if the smu collected metrics data every cycle, or as low as 0 if the smu was asleep the whole time. Reset to 0 after writing.