Lines Matching refs:levels
407 /* Setup BIF_SCLK levels */
822 /* populate graphics levels */
878 struct SMU75_Discrete_GraphicsLevel *levels =
896 levels[i].UpHyst = (uint8_t)
898 levels[i].DownHyst = (uint8_t)
902 levels[i].DeepSleepDivId = 0;
914 levels[i].EnabledForActivity =
919 "There must be 1 or more PCIE levels defined in PPTable.",
923 levels[i].pcieDpmLevel =
948 levels[i].pcieDpmLevel = hightest_pcie_level_enabled;
951 levels[0].pcieDpmLevel = lowest_pcie_level_enabled;
954 levels[1].pcieDpmLevel = mid_pcie_level_enabled;
957 result = smu7_copy_bytes_to_smc(hwmgr, array, (uint8_t *)levels,
1045 struct SMU75_Discrete_MemoryLevel *levels =
1055 &levels[i]);
1060 levels[i].UpHyst = (uint8_t)
1062 levels[i].DownHyst = (uint8_t)
1072 levels[i].EnabledForActivity =
1075 levels[dpm_table->mclk_table.count - 1].DisplayWatermark =
1079 result = smu7_copy_bytes_to_smc(hwmgr, array, (uint8_t *)levels,
2035 "There must be 1 or more PCIE levels defined in PPTable.",
2102 /* Populate BIF_SCLK levels into SMC DPM table */