powerplay/smumgr/fiji_smumgr.c

490 	SMU73_Discrete_DpmTable  *dpm_table = &(smu_data->smc_state_table);
847 	smu_data->smc_state_table.LinkLevelCount =
1015 			smu_data->smc_state_table.GraphicsLevel;
1041 	smu_data->smc_state_table.GraphicsDpmLevelCount =
1231 			smu_data->smc_state_table.MemoryLevel;
1256 	smu_data->smc_state_table.MemoryDpmLevelCount =
1643 			smu_data->smc_state_table.GraphicsBootLevel = level;
1652 			smu_data->smc_state_table.MemoryBootLevel = level;
1697 	smu_data->smc_state_table.ClockStretcherAmount = stretch_amount;
1701 		smu_data->smc_state_table.Sclk_CKS_masterEn0_7 |=
1712 		smu_data->smc_state_table.Sclk_voltageOffset[i] = volt_offset;
1740 	smu_data->smc_state_table.CKS_LOOKUPTable.CKS_LOOKUPTableEntry[0].minFreq =
1742 	smu_data->smc_state_table.CKS_LOOKUPTable.CKS_LOOKUPTableEntry[0].maxFreq =
1744 	clock_freq_u16 = (uint16_t)(PP_SMC_TO_HOST_UL(smu_data->smc_state_table.
1745 			GraphicsLevel[smu_data->smc_state_table.GraphicsDpmLevelCount - 1].
1760 	CONVERT_FROM_HOST_TO_SMC_US(smu_data->smc_state_table.CKS_LOOKUPTable.
1762 	CONVERT_FROM_HOST_TO_SMC_US(smu_data->smc_state_table.CKS_LOOKUPTable.
1764 	smu_data->smc_state_table.CKS_LOOKUPTable.CKS_LOOKUPTableEntry[0].setting =
1766 	smu_data->smc_state_table.CKS_LOOKUPTable.CKS_LOOKUPTableEntry[0].setting |=
1777 		smu_data->smc_state_table.ClockStretcherDataTable.
1780 		smu_data->smc_state_table.ClockStretcherDataTable.
1786 		for (j = 0; j < smu_data->smc_state_table.GraphicsDpmLevelCount; j++) {
1789 					smu_data->smc_state_table.GraphicsLevel[j].SclkFrequency);
1802 			smu_data->smc_state_table.ClockStretcherDataTable.
1805 		CONVERT_FROM_HOST_TO_SMC_US(smu_data->smc_state_table.
1925 	struct SMU73_Discrete_DpmTable *table = &(smu_data->smc_state_table);
2372 	smu_data->smc_state_table.UvdBootLevel = 0;
2374 		smu_data->smc_state_table.UvdBootLevel =
2383 	mm_boot_level_value |= smu_data->smc_state_table.UvdBootLevel << 24;
2393 				(uint32_t)(1 << smu_data->smc_state_table.UvdBootLevel),
2407 		smu_data->smc_state_table.VceBootLevel =
2410 		smu_data->smc_state_table.VceBootLevel = 0;
2419 	mm_boot_level_value |= smu_data->smc_state_table.VceBootLevel << 16;
2426 				(uint32_t)1 << smu_data->smc_state_table.VceBootLevel,
2556 			smu_data->smc_state_table.GraphicsLevel;
2563 			smu_data->smc_state_table.MemoryLevel;
2575 		for (i = 0; i < smu_data->smc_state_table.GraphicsDpmLevelCount; i++) {
2610 		for (i = 0; i < smu_data->smc_state_table.MemoryDpmLevelCount; i++) {