Lines Matching refs:uint32_t
45 uint32_t MinVoltage;
47 uint32_t SclkFrequency;
52 uint32_t CgSpllFuncCntl3;
53 uint32_t CgSpllFuncCntl4;
54 uint32_t SpllSpreadSpectrum;
55 uint32_t SpllSpreadSpectrum2;
56 uint32_t CcPwrDynRm;
57 uint32_t CcPwrDynRm1;
71 uint32_t Flags;
72 uint32_t MinVoltage;
73 uint32_t SclkFrequency;
78 uint32_t CgSpllFuncCntl;
79 uint32_t CgSpllFuncCntl2;
80 uint32_t CgSpllFuncCntl3;
81 uint32_t CgSpllFuncCntl4;
82 uint32_t SpllSpreadSpectrum;
83 uint32_t SpllSpreadSpectrum2;
84 uint32_t CcPwrDynRm;
85 uint32_t CcPwrDynRm1;
91 uint32_t CcPwrDynRm;
92 uint32_t CcPwrDynRm1;
96 uint32_t Reserved;
102 uint32_t MinVoltage;
103 uint32_t MinMvdd;
105 uint32_t MclkFrequency;
129 uint32_t DownThreshold;
130 uint32_t UpThreshold;
131 uint32_t Reserved;
139 uint32_t McArbDramTiming;
140 uint32_t McArbDramTiming2;
157 uint32_t VclkFrequency;
158 uint32_t DclkFrequency;
159 uint32_t MinVoltage;
169 uint32_t Frequency;
170 uint32_t MinVoltage;
178 uint32_t SclkFrequency;
179 uint32_t MclkFrequency;
180 uint32_t VclkFrequency;
181 uint32_t DclkFrequency;
182 uint32_t SamclkFrequency;
183 uint32_t AclkFrequency;
184 uint32_t EclkFrequency;
206 uint32_t SystemFlags;
209 uint32_t VRConfig;
210 uint32_t SmioMask1;
211 uint32_t SmioMask2;
215 uint32_t MvddLevelCount;
236 uint32_t Reserved[4];
250 uint32_t SclkStepSize;
251 uint32_t Smio[SMU73_MAX_ENTRIES_SMIO];
320 uint32_t GeminiApertureHigh;
321 uint32_t GeminiApertureLow;
331 uint32_t spare123[2];
341 uint32_t BAPM_TEMP_GRADIENT;
343 uint32_t LowSclkInterruptThreshold;
344 uint32_t VddGfxReChkWait;
376 uint32_t RefreshPeriod;
391 uint32_t PercentageBusy;
397 uint32_t SigmaDeltaAccum;
398 uint32_t SigmaDeltaOutput;
399 uint32_t SigmaDeltaLevel;
401 uint32_t UtilizationSetpoint;
423 uint32_t MinimumPerfMclk;
469 uint32_t UlvAbortedCount;
470 uint32_t UlvTimeStamp;
476 uint32_t GPU_DBG[3];
477 uint32_t MEC_BaseAddress_Hi;
478 uint32_t MEC_BaseAddress_Lo;
479 uint32_t THM_TMON0_CTRL2__RDIR_PRESENT;
480 uint32_t THM_TMON1_CTRL2__RDIR_PRESENT;
481 uint32_t CP_INT_CNTL;
492 uint32_t VddGfxEnteredCount;
493 uint32_t VddGfxAbortedCount;
495 uint32_t VddGfxVid;
506 uint32_t FilteredIddc;
507 uint32_t IddcLimit;
508 uint32_t IddcHyst;
518 uint32_t FilteredPkgPwr;
519 uint32_t Limit;
520 uint32_t Hyst;
521 uint32_t LimitFromDriver;
528 uint32_t source_powers[SMU73_DTE_SOURCES];
529 uint32_t source_powers_last[SMU73_DTE_SOURCES];
548 uint32_t measured_temperature;
555 uint32_t SavedInterruptMask[2];
567 uint32_t b;
635 uint32_t PsmCharzFreq;
640 uint32_t EnabledAvfsModules;
646 uint32_t version;
647 uint32_t asic_id;
650 uint32_t total_size;
651 uint32_t num_of_entries;
655 uint32_t filler_1[2];
664 uint32_t BufferSize;
665 uint32_t SamplesLogged;
666 uint32_t SampleSize;
667 uint32_t AddrL;
668 uint32_t AddrH;
676 uint32_t temperature;
677 uint32_t cac_acc_nw[CAC_ACC_NW_NUM_OF_SIGNALS];
683 uint32_t VddcTotalPower;
684 uint32_t VddcLeakagePower;
685 uint32_t VddcConstantPower;
686 uint32_t VddcGfxDynamicPower;
687 uint32_t VddcUvdDynamicPower;
688 uint32_t VddcVceDynamicPower;
689 uint32_t VddcAcpDynamicPower;
690 uint32_t VddcPcieDynamicPower;
691 uint32_t VddcDceDynamicPower;
692 uint32_t VddcCurrent;
693 uint32_t VddcVoltage;
694 uint32_t VddciTotalPower;
695 uint32_t VddciLeakagePower;
696 uint32_t VddciConstantPower;
697 uint32_t VddciDynamicPower;
698 uint32_t Vddr1TotalPower;
699 uint32_t Vddr1LeakagePower;
700 uint32_t Vddr1ConstantPower;
701 uint32_t Vddr1DynamicPower;
702 uint32_t spare[4];
703 uint32_t temperature;
713 uint32_t T_hbm_acc;
716 uint32_t I_calc_max;
717 uint32_t I_calc_acc;
718 uint32_t P_meas_acc;
719 uint32_t V_meas_load_acc;
720 uint32_t I_meas_acc;
721 uint32_t P_meas_acc_vddci;
722 uint32_t V_meas_load_acc_vddci;
723 uint32_t I_meas_acc_vddci;
731 uint32_t P_roc_acc;
732 uint32_t PkgPwr_max;
733 uint32_t PkgPwr_acc;
734 uint32_t MclkSwitchingTime_max;
735 uint32_t MclkSwitchingTime_acc;
736 uint32_t FanPwm_acc;
737 uint32_t FanRpm_acc;
738 uint32_t Gfx_busy_acc;
739 uint32_t Mc_busy_acc;
740 uint32_t Fps_acc;
742 uint32_t AccCnt;