powerplay/hwmgr/smu7_hwmgr.c

3597 	struct smu7_performance_level *performance_level;
3640 	performance_level = &(smu7_power_state->performance_levels
3655 	performance_level->memory_clock = mclk_dep_table->entries
3658 		performance_level->engine_clock = ((ATOM_Tonga_SCLK_Dependency_Table *)sclk_dep_table)->entries
3661 		performance_level->engine_clock = ((ATOM_Polaris_SCLK_Dependency_Table *)sclk_dep_table)->entries
3663 	performance_level->pcie_gen = get_pcie_gen_support(data->pcie_gen_cap,
3665 	performance_level->pcie_lane = get_pcie_lane_support(data->pcie_lane_cap,
3668 	performance_level = &(smu7_power_state->performance_levels
3670 	performance_level->memory_clock = mclk_dep_table->entries
3674 		performance_level->engine_clock = ((ATOM_Tonga_SCLK_Dependency_Table *)sclk_dep_table)->entries
3677 		performance_level->engine_clock = ((ATOM_Polaris_SCLK_Dependency_Table *)sclk_dep_table)->entries
3680 	performance_level->pcie_gen = get_pcie_gen_support(data->pcie_gen_cap,
3682 	performance_level->pcie_lane = get_pcie_lane_support(data->pcie_lane_cap,
3797 	struct smu7_performance_level *performance_level;
3818 	performance_level = &(ps->performance_levels
3822 	performance_level->memory_clock = memory_clock;
3823 	performance_level->engine_clock = engine_clock;
3827 	performance_level->pcie_gen = get_pcie_gen_support(data->pcie_gen_cap, pcie_gen_from_bios);
3828 	performance_level->pcie_lane = get_pcie_lane_support(data->pcie_lane_cap, visland_clk_info->usPCIELane);