Lines Matching refs:dpm_level_enable_mask
3038 if (data->dpm_level_enable_mask.pcie_dpm_enable_mask) {
3040 tmp = data->dpm_level_enable_mask.pcie_dpm_enable_mask;
3052 if (data->dpm_level_enable_mask.sclk_dpm_enable_mask) {
3054 tmp = data->dpm_level_enable_mask.sclk_dpm_enable_mask;
3067 if (data->dpm_level_enable_mask.mclk_dpm_enable_mask) {
3069 tmp = data->dpm_level_enable_mask.mclk_dpm_enable_mask;
3093 if (data->dpm_level_enable_mask.sclk_dpm_enable_mask)
3096 data->dpm_level_enable_mask.sclk_dpm_enable_mask,
3101 if (data->dpm_level_enable_mask.mclk_dpm_enable_mask)
3104 data->dpm_level_enable_mask.mclk_dpm_enable_mask,
3134 if (data->dpm_level_enable_mask.sclk_dpm_enable_mask) {
3136 data->dpm_level_enable_mask.sclk_dpm_enable_mask);
3145 if (data->dpm_level_enable_mask.mclk_dpm_enable_mask) {
3147 data->dpm_level_enable_mask.mclk_dpm_enable_mask);
3156 if (data->dpm_level_enable_mask.pcie_dpm_enable_mask) {
3158 data->dpm_level_enable_mask.pcie_dpm_enable_mask);
4351 data->dpm_level_enable_mask.sclk_dpm_enable_mask =
4353 data->dpm_level_enable_mask.mclk_dpm_enable_mask =
4355 data->dpm_level_enable_mask.pcie_dpm_enable_mask =
4925 data->dpm_level_enable_mask.sclk_dpm_enable_mask & mask,
4932 data->dpm_level_enable_mask.mclk_dpm_enable_mask & mask,
4937 uint32_t tmp = mask & data->dpm_level_enable_mask.pcie_dpm_enable_mask;
5618 if (data->dpm_level_enable_mask.sclk_dpm_enable_mask) {
5620 tmp = data->dpm_level_enable_mask.sclk_dpm_enable_mask;
5627 smu7_force_clock_level(hwmgr, PP_SCLK, data->dpm_level_enable_mask.sclk_dpm_enable_mask);