powerplay/hwmgr/smu7_hwmgr.c

182 				 return NULL);
192 				 return NULL);
254 		smum_send_msg_to_smc(hwmgr, PPSMC_MSG_Voltage_Cntl_Enable, NULL);
293 	PP_ASSERT_WITH_CODE((NULL != voltage_table),
561 	return smum_send_msg_to_smc(hwmgr, PPSMC_MSG_ResetToDefaults, NULL);
640 	struct phm_ppt_v1_pcie_table *pcie_table = NULL;
649 	if (table_info != NULL)
666 	if (pcie_table != NULL) {
792 	PP_ASSERT_WITH_CODE(allowed_vdd_sclk_table != NULL,
797 	PP_ASSERT_WITH_CODE(allowed_vdd_mclk_table != NULL,
816 	PP_ASSERT_WITH_CODE(allowed_vdd_mclk_table != NULL,
841 	if (NULL != allowed_vdd_mclk_table) {
852 	if (NULL != allowed_vdd_mclk_table) {
877 	if (table_info == NULL)
883 	PP_ASSERT_WITH_CODE(dep_sclk_table != NULL,
890 	PP_ASSERT_WITH_CODE(dep_mclk_table != NULL,
944 	if (table_info == NULL)
1016 	if (table_info == NULL)
1095 				NULL);
1112 		return smum_send_msg_to_smc(hwmgr, PPSMC_MSG_EnableULV, NULL);
1122 		return smum_send_msg_to_smc(hwmgr, PPSMC_MSG_DisableULV, NULL);
1131 		if (smum_send_msg_to_smc(hwmgr, PPSMC_MSG_MASTER_DeepSleep_ON, NULL))
1138 				NULL)) {
1154 				NULL)) {
1208 		(0 == smum_send_msg_to_smc(hwmgr, PPSMC_MSG_DPM_Enable, NULL)),
1221 						NULL)),
1298 						NULL)),
1305 						NULL)),
1314 				NULL)),
1331 		smum_send_msg_to_smc(hwmgr, PPSMC_MSG_DPM_Disable, NULL);
1339 		smum_send_msg_to_smc(hwmgr, PPSMC_MSG_MCLKDPM_Disable, NULL);
1361 						NULL) == 0),
1372 	smum_send_msg_to_smc(hwmgr, PPSMC_MSG_Voltage_Cntl_Disable, NULL);
1493 					   NULL);
1497 					   NULL);
1634 		smum_send_msg_to_smc(hwmgr, (PPSMC_Msg)PPSMC_NoDisplay, NULL);
1702 					hwmgr, PPSMC_MSG_EnableAvfs, NULL),
1709 				hwmgr, PPSMC_MSG_DisableAvfs, NULL),
2055 	struct phm_ppt_v1_clock_voltage_dependency_table *sclk_table = NULL;
2103 					if (table_info == NULL)
2250 	PP_ASSERT_WITH_CODE((NULL != look_up_table),
2456 	PP_ASSERT_WITH_CODE(allowed_sclk_vdd_table != NULL,
2463 	PP_ASSERT_WITH_CODE(allowed_mclk_vdd_table != NULL,
2501 	if (table_info != NULL) {
2567 	if (table_info == NULL)
2849 	PP_ASSERT_WITH_CODE(allowed_sclk_vddc_table != NULL,
2856 	PP_ASSERT_WITH_CODE(allowed_mclk_vddc_table != NULL,
2873 	if (allowed_mclk_vddci_table != NULL && allowed_mclk_vddci_table->count >= 1) {
2878 	if (hwmgr->dyn_state.vddci_dependency_on_mclk != NULL && hwmgr->dyn_state.vddci_dependency_on_mclk->count >= 1)
2887 	hwmgr->dyn_state.vddc_dep_on_dal_pwrl = NULL;
2889 	hwmgr->backend = NULL;
2964 	if (data == NULL)
2978 			hwmgr->backend = NULL;
3047 						NULL);
3062 						NULL);
3077 						NULL);
3097 					NULL);
3105 					NULL);
3121 				NULL);
3140 							    NULL);
3151 							    NULL);
3162 							    NULL);
3491 	if (hwmgr == NULL)
3496 	if (ps == NULL)
3513 	if (hwmgr == NULL)
3518 	if (ps == NULL)
3710 	if (dep_mclk_table != NULL && dep_mclk_table->count == 1) {
3858 	if (dep_mclk_table != NULL && dep_mclk_table->count == 1) {
3978 	smum_send_msg_to_smc(hwmgr, PPSMC_MSG_PmStatusLogStart, NULL);
3984 		smum_send_msg_to_smc(hwmgr, PPSMC_MSG_PmStatusLogSample, NULL);
4220 				NULL),
4234 				NULL),
4377 				NULL),
4391 				NULL),
4439 	return (smum_send_msg_to_smc(hwmgr, (PPSMC_Msg)PPSMC_NoDisplay, NULL) == 0) ?  0 : -EINVAL;
4450 					NULL);
4454 					NULL);
4458 	return (smum_send_msg_to_smc(hwmgr, (PPSMC_Msg)PPSMC_HasDisplay, NULL) == 0) ?  0 : -EINVAL;
4506 	if (hwmgr->hardcode_pp_table != NULL)
4558 			NULL);
4639 			NULL);
4718 	if (pstate1 == NULL || pstate2 == NULL || equal == NULL)
4774 			smum_send_msg_to_smc(hwmgr, PPSMC_MSG_EnableFFC, NULL);
4781 			smum_send_msg_to_smc(hwmgr, PPSMC_MSG_DisableFFC, NULL);
4926 					NULL);
4933 					NULL);
4942 						NULL);
4947 					NULL);
5110 	if (ps == NULL)
5152 	if (ps == NULL)
5170 	struct phm_ppt_v1_clock_voltage_dependency_table *dep_sclk_table = NULL;
5175 		if (table_info == NULL || table_info->vdd_dep_on_sclk == NULL)
5212 		if (table_info == NULL)
5414 	if (clocks == NULL)
5489 	struct phm_odn_clock_levels *podn_dpm_table_in_backend = NULL;
5490 	struct smu7_odn_clock_voltage_dependency_table *podn_vdd_dep_in_backend = NULL;
5497 	PP_ASSERT_WITH_CODE(input, "NULL user input for clock and voltage",
5637 	if (input == NULL)
5709 	if (level == NULL || hwmgr == NULL || state == NULL)