Lines Matching refs:vddci

3311 					  u16 *vddc, u16 *vddci)
3316 if ((0 == *vddc) || (0 == *vddci))
3319 if (*vddc > *vddci) {
3320 if ((*vddc - *vddci) > adev->pm.dpm.dyn_state.vddc_vddci_delta) {
3323 *vddci = (new_voltage < max_vddci) ? new_voltage : max_vddci;
3326 if ((*vddci - *vddc) > adev->pm.dpm.dyn_state.vddc_vddci_delta) {
3328 (*vddci - adev->pm.dpm.dyn_state.vddc_vddci_delta));
3430 u16 vddc, vddci, min_vce_voltage = 0;
3496 if (ps->performance_levels[i].vddci > max_limits->vddci)
3497 ps->performance_levels[i].vddci = max_limits->vddci;
3536 vddci = ps->performance_levels[ps->performance_level_count - 1].vddci;
3539 vddci = ps->performance_levels[0].vddci;
3561 ps->performance_levels[0].vddci = vddci;
3590 ps->performance_levels[i].vddci = vddci;
3596 if (ps->performance_levels[i].vddci < ps->performance_levels[i - 1].vddci)
3597 ps->performance_levels[i].vddci = ps->performance_levels[i - 1].vddci;
3613 max_limits->vddci, &ps->performance_levels[i].vddci);
3624 max_limits->vddc, max_limits->vddci,
3626 &ps->performance_levels[i].vddci);
4897 initial_state->performance_levels[0].vddci,
4898 &table->initialState.level.vddci);
5050 &table->ACPIState.level.vddci);
5546 pl->vddci, &level->vddci);
7199 pl->vddci = le16_to_cpu(clock_info->si.usVDDCI);
7214 eg_pi->acpi_vddci = pl->vddci;
7237 u16 vddc, vddci, mvdd;
7238 amdgpu_atombios_get_default_voltages(adev, &vddc, &vddci, &mvdd);
7242 pl->vddci = vddci;
7251 adev->pm.dpm.dyn_state.max_clock_voltage_on_ac.vddci = pl->vddci;
7543 seq_printf(m, "power level %d sclk: %u mclk: %u vddc: %u vddci: %u pcie gen: %u\n",
7544 current_index, pl->sclk, pl->mclk, pl->vddc, pl->vddci, pl->pcie_gen + 1);
7932 DRM_INFO("\t\tpower level %d sclk: %u mclk: %u vddc: %u vddci: %u pcie gen: %u\n",
7933 i, pl->sclk, pl->mclk, pl->vddc, pl->vddci, pl->pcie_gen + 1);
7935 DRM_INFO("\t\tpower level %d sclk: %u mclk: %u vddc: %u vddci: %u\n",
7936 i, pl->sclk, pl->mclk, pl->vddc, pl->vddci);
7959 (si_cpl1->vddci == si_cpl2->vddci));