Lines Matching refs:xa
32 #define UVD_PGFSM_CONFIG__UVDIL_PWR_CONFIG__SHIFT 0xa
55 #define UVD_PGFSM_STATUS__UVDIL_PWR_STATUS__SHIFT 0xa
78 #define UVD_POWER_STATUS__JRBC_SNOOP_DIS__SHIFT 0xa
439 #define UVD_SUVD_CGC_GATE__SCM_HEVC__SHIFT 0xa
490 #define UVD_SUVD_CGC_STATUS__SCM_H264_DCLK__SHIFT 0xa
758 #define UVD_JRBC_STATUS__RB_TRAP_STATUS__SHIFT 0xa
815 #define UVD_CGC_GATE__LBSI__SHIFT 0xa
856 #define UVD_CGC_STATUS__REGS_VCLK__SHIFT 0xa
1074 #define UVD_LMI_SWAP_CNTL__CM_MC_SWAP__SHIFT 0xa
1200 #define UVD_SOFT_RESET__IH_SOFT_RESET__SHIFT 0xa