Lines Matching refs:x1
72 #define XPB_RTR_DEST_MAP0__DEST_OFFSET__SHIFT 0x1
85 #define XPB_RTR_DEST_MAP1__DEST_OFFSET__SHIFT 0x1
98 #define XPB_RTR_DEST_MAP2__DEST_OFFSET__SHIFT 0x1
111 #define XPB_RTR_DEST_MAP3__DEST_OFFSET__SHIFT 0x1
124 #define XPB_RTR_DEST_MAP4__DEST_OFFSET__SHIFT 0x1
137 #define XPB_RTR_DEST_MAP5__DEST_OFFSET__SHIFT 0x1
150 #define XPB_RTR_DEST_MAP6__DEST_OFFSET__SHIFT 0x1
163 #define XPB_RTR_DEST_MAP7__DEST_OFFSET__SHIFT 0x1
176 #define XPB_RTR_DEST_MAP8__DEST_OFFSET__SHIFT 0x1
189 #define XPB_RTR_DEST_MAP9__DEST_OFFSET__SHIFT 0x1
202 #define XPB_RTR_DEST_MAP10__DEST_OFFSET__SHIFT 0x1
215 #define XPB_RTR_DEST_MAP11__DEST_OFFSET__SHIFT 0x1
228 #define XPB_RTR_DEST_MAP12__DEST_OFFSET__SHIFT 0x1
241 #define XPB_RTR_DEST_MAP13__DEST_OFFSET__SHIFT 0x1
561 #define XPB_PEER_SYS_BAR0__ADDR__SHIFT 0x1
566 #define XPB_PEER_SYS_BAR1__ADDR__SHIFT 0x1
571 #define XPB_PEER_SYS_BAR2__ADDR__SHIFT 0x1
576 #define XPB_PEER_SYS_BAR3__ADDR__SHIFT 0x1
581 #define XPB_PEER_SYS_BAR4__ADDR__SHIFT 0x1
586 #define XPB_PEER_SYS_BAR5__ADDR__SHIFT 0x1
591 #define XPB_PEER_SYS_BAR6__ADDR__SHIFT 0x1
596 #define XPB_PEER_SYS_BAR7__ADDR__SHIFT 0x1
601 #define XPB_PEER_SYS_BAR8__ADDR__SHIFT 0x1
606 #define XPB_PEER_SYS_BAR9__ADDR__SHIFT 0x1
611 #define XPB_PEER_SYS_BAR10__ADDR__SHIFT 0x1
616 #define XPB_PEER_SYS_BAR11__ADDR__SHIFT 0x1
621 #define XPB_PEER_SYS_BAR12__ADDR__SHIFT 0x1
626 #define XPB_PEER_SYS_BAR13__ADDR__SHIFT 0x1
674 #define XPB_PIPE_STS__WCB_HST_DATA_BUF_CNT__SHIFT 0x1
717 #define XPB_SUB_CTRL__STALL_CNS_RTR_REQ__SHIFT 0x1
814 #define XPB_CLG_GFX_MATCH_VLD__FARBIRC1_VLD__SHIFT 0x1
841 #define XPB_CLG_MM_MATCH_VLD__FARBIRC1_VLD__SHIFT 0x1
991 #define RPB_PASSPW_CONF__XPB_RSPPASSPW_OVERRIDE__SHIFT 0x1
1109 #define RPB_BIF_CNTL2__DRAIN_VC_NUM__SHIFT 0x1
1136 #define RPB_SDPPORT_CNTL__NBIF_DMA_CFG_MODE__SHIFT 0x1
1228 #define RPB_ATS_CNTL__TR_MIN_LATENCY_ENABLE__SHIFT 0x1