resource/dcn30/dcn30_resource.c

1322 	display_e2e_pipe_params_st *pipes,
1329 	dcn20_populate_dml_pipes_from_context(dc, context, pipes, fast_validate);
1336 		pipes[pipe_cnt++].pipe.scale_ratio_depth.lb_depth =
1344 	struct dc *dc, struct resource_context *res_ctx, display_e2e_pipe_params_st *pipes)
1347 	dcn30_fpu_populate_dml_writeback_from_context(dc, res_ctx, pipes);
1377 		display_e2e_pipe_params_st *pipes,
1408 			dcn30_fpu_set_mcif_arb_params(wb_arb_params, dml, pipes, pipe_cnt, j);
1612 	 * May need to fix pipes getting tossed from 1 opp to another on flip
1631 		display_e2e_pipe_params_st *pipes,
1645 	ASSERT(pipes);
1646 	if (!pipes)
1653 	pipe_cnt = dc->res_pool->funcs->populate_dml_pipes(dc, context, pipes, fast_validate);
1660 	dml_log_pipe_params(&context->bw_ctx.dml, pipes, pipe_cnt);
1670 		vlevel = dml_get_voltage_level(&context->bw_ctx.dml, pipes, pipe_cnt);
1689 		vlevel = dml_get_voltage_level(&context->bw_ctx.dml, pipes, pipe_cnt);
1724 	/* merge pipes if necessary */
1728 		/*skip pipes that don't need merging*/
1732 		/* if ODM merge we ignore mpc tree, mpo pipes will have their own flags */
1872 		pipe_cnt = dc->res_pool->funcs->populate_dml_pipes(dc, context, pipes, fast_validate);
2029 		display_e2e_pipe_params_st *pipes,
2034 	dcn30_fpu_calculate_wm_and_dlg(dc, context, pipes, pipe_cnt, vlevel);
2048 	display_e2e_pipe_params_st *pipes = kzalloc(dc->res_pool->pipe_count * sizeof(display_e2e_pipe_params_st), GFP_KERNEL);
2053 	if (!pipes)
2057 	out = dcn30_internal_validate_bw(dc, context, pipes, &pipe_cnt, &vlevel, fast_validate, true);
2075 		dc->res_pool->funcs->calculate_wm_and_dlg(dc, context, pipes, pipe_cnt, vlevel);
2090 	kfree(pipes);
2261 	/* Support for max 6 pipes */