resource/dce100/dce100_resource.c

756 static void dce100_resource_destruct(struct dce110_resource_pool *pool)
760 	for (i = 0; i < pool->base.pipe_count; i++) {
761 		if (pool->base.opps[i] != NULL)
762 			dce110_opp_destroy(&pool->base.opps[i]);
764 		if (pool->base.transforms[i] != NULL)
765 			dce100_transform_destroy(&pool->base.transforms[i]);
767 		if (pool->base.ipps[i] != NULL)
768 			dce_ipp_destroy(&pool->base.ipps[i]);
770 		if (pool->base.mis[i] != NULL) {
771 			kfree(TO_DCE_MEM_INPUT(pool->base.mis[i]));
772 			pool->base.mis[i] = NULL;
775 		if (pool->base.timing_generators[i] != NULL)	{
776 			kfree(DCE110TG_FROM_TG(pool->base.timing_generators[i]));
777 			pool->base.timing_generators[i] = NULL;
781 	for (i = 0; i < pool->base.res_cap->num_ddc; i++) {
782 		if (pool->base.engines[i] != NULL)
783 			dce110_engine_destroy(&pool->base.engines[i]);
784 		if (pool->base.hw_i2cs[i] != NULL) {
785 			kfree(pool->base.hw_i2cs[i]);
786 			pool->base.hw_i2cs[i] = NULL;
788 		if (pool->base.sw_i2cs[i] != NULL) {
789 			kfree(pool->base.sw_i2cs[i]);
790 			pool->base.sw_i2cs[i] = NULL;
794 	for (i = 0; i < pool->base.stream_enc_count; i++) {
795 		if (pool->base.stream_enc[i] != NULL)
796 			kfree(DCE110STRENC_FROM_STRENC(pool->base.stream_enc[i]));
799 	for (i = 0; i < pool->base.clk_src_count; i++) {
800 		if (pool->base.clock_sources[i] != NULL)
801 			dce100_clock_source_destroy(&pool->base.clock_sources[i]);
804 	if (pool->base.dp_clock_source != NULL)
805 		dce100_clock_source_destroy(&pool->base.dp_clock_source);
807 	for (i = 0; i < pool->base.audio_count; i++)	{
808 		if (pool->base.audios[i] != NULL)
809 			dce_aud_destroy(&pool->base.audios[i]);
812 	if (pool->base.abm != NULL)
813 				dce_abm_destroy(&pool->base.abm);
815 	if (pool->base.dmcu != NULL)
816 			dce_dmcu_destroy(&pool->base.dmcu);
818 	if (pool->base.irqs != NULL)
819 		dal_irq_service_destroy(&pool->base.irqs);
912 static void dce100_destroy_resource_pool(struct resource_pool **pool)
914 	struct dce110_resource_pool *dce110_pool = TO_DCE110_RES_POOL(*pool);
918 	*pool = NULL;
932 		const struct resource_pool *pool,
939 	for (i = 0; i < pool->stream_enc_count; i++) {
941 				pool->stream_enc[i]) {
946 			if (pool->stream_enc[i]->id ==
948 				return pool->stream_enc[i];
966 		return pool->stream_enc[j];
985 	struct dce110_resource_pool *pool)
993 	pool->base.res_cap = &res_cap;
994 	pool->base.funcs = &dce100_res_pool_funcs;
995 	pool->base.underlay_pipe_index = NO_UNDERLAY_PIPE;
1000 		pool->base.dp_clock_source =
1003 		pool->base.clock_sources[0] =
1005 		pool->base.clock_sources[1] =
1007 		pool->base.clock_sources[2] =
1009 		pool->base.clk_src_count = 3;
1012 		pool->base.dp_clock_source =
1015 		pool->base.clock_sources[0] =
1017 		pool->base.clock_sources[1] =
1019 		pool->base.clk_src_count = 2;
1022 	if (pool->base.dp_clock_source == NULL) {
1028 	for (i = 0; i < pool->base.clk_src_count; i++) {
1029 		if (pool->base.clock_sources[i] == NULL) {
1036 	pool->base.dmcu = dce_dmcu_create(ctx,
1040 	if (pool->base.dmcu == NULL) {
1046 	pool->base.abm = dce_abm_create(ctx,
1050 	if (pool->base.abm == NULL) {
1059 		pool->base.irqs = dal_irq_service_dce110_create(&init_data);
1060 		if (!pool->base.irqs)
1067 	pool->base.underlay_pipe_index = NO_UNDERLAY_PIPE;
1068 	pool->base.pipe_count = res_cap.num_timing_generator;
1069 	pool->base.timing_generator_count = pool->base.res_cap->num_timing_generator;
1080 	for (i = 0; i < pool->base.pipe_count; i++) {
1081 		pool->base.timing_generators[i] =
1086 		if (pool->base.timing_generators[i] == NULL) {
1092 		pool->base.mis[i] = dce100_mem_input_create(ctx, i);
1093 		if (pool->base.mis[i] == NULL) {
1100 		pool->base.ipps[i] = dce100_ipp_create(ctx, i);
1101 		if (pool->base.ipps[i] == NULL) {
1108 		pool->base.transforms[i] = dce100_transform_create(ctx, i);
1109 		if (pool->base.transforms[i] == NULL) {
1116 		pool->base.opps[i] = dce100_opp_create(ctx, i);
1117 		if (pool->base.opps[i] == NULL) {
1125 	for (i = 0; i < pool->base.res_cap->num_ddc; i++) {
1126 		pool->base.engines[i] = dce100_aux_engine_create(ctx, i);
1127 		if (pool->base.engines[i] == NULL) {
1133 		pool->base.hw_i2cs[i] = dce100_i2c_hw_create(ctx, i);
1134 		if (pool->base.hw_i2cs[i] == NULL) {
1140 		pool->base.sw_i2cs[i] = NULL;
1143 	dc->caps.max_planes =  pool->base.pipe_count;
1148 	if (!resource_construct(num_virtual_links, dc, &pool->base,
1157 	dce100_resource_destruct(pool);
1166 	struct dce110_resource_pool *pool =
1169 	if (!pool)
1172 	if (dce100_resource_construct(num_virtual_links, dc, pool))
1173 		return &pool->base;
1175 	kfree(pool);