Lines Matching refs:DSC
749 /* 7 fractional digits decimal precision for bytes per pixel is enough because DSC
775 /* The stream with these settings can be sent (unblanked) only after DSC was enabled on RX first,
793 * with DSC such as 480p60Hz, the dispclk could be low enough to trigger
810 /* Enable DSC hw block */
837 /* Enable DSC in encoder */
839 DC_LOG_DSC("Setting stream encoder DSC config for engine %d:", (int)pipe_ctx->stream_res.stream_enc->id);
849 /* Enable DSC in OPTC */
850 DC_LOG_DSC("Setting optc DSC config for tg instance %d:", pipe_ctx->stream_res.tg->inst);
857 /* disable DSC in OPTC */
862 /* disable DSC in stream encoder */
879 /* disable DSC block */
898 * immediate_update is only applicable when DSC is enabled.
905 if (!pipe_ctx->stream->timing.flags.DSC)
920 /* Enable DSC hw block */
931 DC_LOG_DSC("Setting stream encoder DSC PPS SDP for engine %d\n", (int)pipe_ctx->stream_res.stream_enc->id);
946 /* disable DSC PPS in stream encoder */
969 if (!pipe_ctx->stream->timing.flags.DSC)
992 if (!pipe_ctx->stream->timing.flags.DSC)
2372 if (pipe_ctx->stream->timing.flags.DSC) {
2485 !pipe_ctx->stream->timing.flags.DSC &&
2495 /* Have to setup DSC before DIG FE and BE are connected (which happens before the
2501 if (pipe_ctx->stream->timing.flags.DSC) {
2558 if (pipe_ctx->stream->timing.flags.DSC) {