Lines Matching refs:uint32_t
57 uint32_t IS_HBR2_CAPABLE:1;
58 uint32_t IS_HBR3_CAPABLE:1;
59 uint32_t IS_TPS3_CAPABLE:1;
60 uint32_t IS_TPS4_CAPABLE:1;
61 uint32_t HDMI_6GB_EN:1;
62 uint32_t IS_DP2_CAPABLE:1;
63 uint32_t IS_UHBR10_CAPABLE:1;
64 uint32_t IS_UHBR13_5_CAPABLE:1;
65 uint32_t IS_UHBR20_CAPABLE:1;
66 uint32_t DP_IS_USB_C:1;
68 uint32_t raw;
84 uint32_t output_signals;
94 uint32_t dphy_fec_en;
95 uint32_t dphy_fec_ready_shadow;
96 uint32_t dphy_fec_active_status;
97 uint32_t dp_link_training_complete;
119 uint32_t pixel_clock);
128 uint32_t pixel_clock);
170 uint32_t hpo_inst);
217 uint32_t link_enc_enabled;
218 uint32_t link_mode;
219 uint32_t lane_count;
220 uint32_t slot_count[4];
221 uint32_t stream_src[4];
222 uint32_t vc_rate_x[4];
223 uint32_t vc_rate_y[4];
262 uint32_t stream_encoder_inst,