dc/dml2/dml2_translation_helper.c

7  * to deal in the Software without restriction, including without limitation
12  * The above copyright notice and this permission notice shall be included in
174 		out->vblank_nom_default_us = 668; /*not in dml, but in programming guide, hard coded in dml2_translate_ip_params*/
175 		out->config_return_buffer_segment_size_in_kbytes = 64; /*required, but not exist,, hard coded in dml2_translate_ip_params*/
445 void dml2_translate_ip_params(const struct dc *in, struct ip_params_st *out)
447 	const struct _vcs_dpi_ip_params_st *in_ip_params = &in->dml.ip;
514 void dml2_translate_socbb_params(const struct dc *in, struct soc_bounding_box_st *out)
516 	const struct _vcs_dpi_soc_bounding_box_st *in_soc_params = &in->dml.soc;
587 static void populate_dml_timing_cfg_from_stream_state(struct dml_timing_cfg_st *out, unsigned int location, const struct dc_stream_state *in)
591 	out->HActive[location] = in->timing.h_addressable + in->timing.h_border_left + in->timing.h_border_right;
592 	out->VActive[location] = in->timing.v_addressable + in->timing.v_border_bottom + in->timing.v_border_top;
593 	out->RefreshRate[location] = ((in->timing.pix_clk_100hz * 100) / in->timing.h_total) / in->timing.v_total;
594 	out->VFrontPorch[location] = in->timing.v_front_porch;
595 	out->PixelClock[location] = in->timing.pix_clk_100hz / 10000.00;
596 	if (in->timing.timing_3d_format == TIMING_3D_FORMAT_HW_FRAME_PACKING)
598 	out->HTotal[location] = in->timing.h_total;
599 	out->VTotal[location] = in->timing.v_total;
600 	out->Interlace[location] = in->timing.flags.INTERLACE;
601 	hblank_start = in->timing.h_total - in->timing.h_front_porch;
603 					- in->timing.h_addressable
604 					- in->timing.h_border_left
605 					- in->timing.h_border_right;
606 	vblank_start = in->timing.v_total - in->timing.v_front_porch;
608 					- in->timing.v_addressable
609 					- in->timing.v_border_top
610 					- in->timing.v_border_bottom;
615 				const struct dc_stream_state *in, const struct pipe_ctx *pipe)
619 	out->DSCEnable[location] = (enum dml_dsc_enable)in->timing.flags.DSC;
620 	out->OutputLinkDPLanes[location] = 4; // As per code in dcn20_resource.c
621 	out->DSCInputBitPerComponent[location] = 12; // As per code in dcn20_resource.c
623 	switch (in->signal) {
642 	switch (in->timing.display_color_depth) {
672 	switch (in->timing.pixel_encoding) {
683 		if (in->timing.flags.DSC && !in->timing.dsc_cfg.ycbcr422_simple)
695 	if (in->timing.flags.DSC) {
696 		out->OutputBpp[location] = in->timing.dsc_cfg.bits_per_pixel / 16.0;
702 	switch (in->signal) {
718 	out->PixelClockBackEnd[location] = in->timing.pix_clk_100hz / 10000.00;
720 	out->AudioSampleLayout[location] = in->audio_info.modes->sample_size;
721 	out->AudioSampleRate[location] = in->audio_info.modes->max_bit_rate;
726 static void populate_dummy_dml_surface_cfg(struct dml_surface_cfg_st *out, unsigned int location, const struct dc_stream_state *in)
728 	out->SurfaceWidthY[location] = in->timing.h_addressable;
729 	out->SurfaceHeightY[location] = in->timing.v_addressable;
730 	out->SurfaceWidthC[location] = in->timing.h_addressable;
731 	out->SurfaceHeightC[location] = in->timing.v_addressable;
745 static void populate_dml_surface_cfg_from_plane_state(enum dml_project_id dml2_project, struct dml_surface_cfg_st *out, unsigned int location, const struct dc_plane_state *in)
747 	out->PitchY[location] = in->plane_size.surface_pitch;
748 	out->SurfaceHeightY[location] = in->plane_size.surface_size.height;
749 	out->SurfaceWidthY[location] = in->plane_size.surface_size.width;
750 	out->SurfaceHeightC[location] = in->plane_size.chroma_size.height;
751 	out->SurfaceWidthC[location] = in->plane_size.chroma_size.width;
752 	out->PitchC[location] = in->plane_size.chroma_pitch;
753 	out->DCCEnable[location] = in->dcc.enable;
754 	out->DCCMetaPitchY[location] = in->dcc.meta_pitch;
755 	out->DCCMetaPitchC[location] = in->dcc.meta_pitch_c;
758 	out->DCCFractionOfZeroSizeRequestsLuma[location] = in->dcc.independent_64b_blks;
759 	out->DCCFractionOfZeroSizeRequestsChroma[location] = in->dcc.independent_64b_blks_c;
763 		out->SurfaceTiling[location] = (enum dml_swizzle_mode)in->tiling_info.gfx9.swizzle;
767 	switch (in->format) {
797 static struct scaler_data get_scaler_data_for_plane(const struct dc_plane_state *in, struct dc_state *context)
807 		if (pipe->plane_state == in && !pipe->prev_odm_pipe) {
821 static void populate_dummy_dml_plane_cfg(struct dml_plane_cfg_st *out, unsigned int location, const struct dc_stream_state *in)
825 	if (in->timing.h_addressable > 3840)
828 		width = in->timing.h_addressable;	// 4K max
830 	if (in->timing.v_addressable > 2160)
833 		height = in->timing.v_addressable;	// 4K max
875 static void populate_dml_plane_cfg_from_plane_state(struct dml_plane_cfg_st *out, unsigned int location, const struct dc_plane_state *in, struct dc_state *context)
877 	const struct scaler_data scaler_data = get_scaler_data_for_plane(in, context);
901 	 * value current used in Navi3x .
934 	out->SourceScan[location] = (enum dml_rotation_angle)in->rotation;
935 	out->ScalerRecoutWidth[location] = in->dst_rect.width;
1070 	//Generally these are set by referencing our latest BB/IP params in dcn32_resource.c file