dml/dcn321/dcn321_fpu.c

210 static void dcn321_insert_entry_into_table_sorted(struct _vcs_dpi_voltage_scaling_st *table,
220 		table[0] = *entry;
223 		while (entry->net_bw_in_kbytes_sec > table[index].net_bw_in_kbytes_sec) {
230 			table[i] = table[i - 1];
232 		table[index] = *entry;
237 static void remove_entry_from_table_at_index(struct _vcs_dpi_voltage_scaling_st *table, unsigned int *num_entries,
246 		table[i] = table[i + 1];
248 	memset(&table[--(*num_entries)], 0, sizeof(struct _vcs_dpi_voltage_scaling_st));
262 static void sort_entries_with_same_bw(struct _vcs_dpi_voltage_scaling_st *table, unsigned int *num_entries)
269 		if (table[i].net_bw_in_kbytes_sec == table[i+1].net_bw_in_kbytes_sec) {
270 			current_bw = table[i].net_bw_in_kbytes_sec;
274 			while ((i < (*num_entries - 1)) && (table[i+1].net_bw_in_kbytes_sec == current_bw))
281 					if (table[k].dcfclk_mhz > table[k+1].dcfclk_mhz)
282 						swap_table_entries(&table[k], &table[k+1]);
297 static void remove_inconsistent_entries(struct _vcs_dpi_voltage_scaling_st *table, unsigned int *num_entries)
300 		if (table[i].net_bw_in_kbytes_sec == table[i+1].net_bw_in_kbytes_sec) {
301 			if ((table[i].dram_speed_mts > table[i+1].dram_speed_mts) ||
302 				(table[i].fabricclk_mhz > table[i+1].fabricclk_mhz))
303 				remove_entry_from_table_at_index(table, num_entries, i);
345 		struct _vcs_dpi_voltage_scaling_st *table, unsigned int *num_entries)
441 		dcn321_insert_entry_into_table_sorted(table, num_entries, &entry);
451 	dcn321_insert_entry_into_table_sorted(table, num_entries, &entry);
461 		dcn321_insert_entry_into_table_sorted(table, num_entries, &entry);
473 			dcn321_insert_entry_into_table_sorted(table, num_entries, &entry);
484 		dcn321_insert_entry_into_table_sorted(table, num_entries, &entry);
487 	// At this point, the table contains all "points of interest" based on
493 		if (table[i].dcfclk_mhz > max_clk_data.dcfclk_mhz ||
494 				table[i].fabricclk_mhz > max_clk_data.fclk_mhz ||
495 				table[i].dram_speed_mts > max_clk_data.memclk_mhz * 16)
496 			remove_entry_from_table_at_index(table, num_entries, i);
508 		dcn321_insert_entry_into_table_sorted(table, num_entries, &max_dc_limits_entry);
510 		sort_entries_with_same_bw(table, num_entries);
511 		remove_inconsistent_entries(table, num_entries);
516 	// At this point, the table only contains supported points of interest
524 			if (bw_params->clk_table.entries[j].memclk_mhz * 16 >= table[i].dram_speed_mts) {
525 				table[i].dram_speed_mts = bw_params->clk_table.entries[j].memclk_mhz * 16;
535 				if (bw_params->clk_table.entries[j].fclk_mhz >= table[i].fabricclk_mhz) {
536 					table[i].fabricclk_mhz = bw_params->clk_table.entries[j].fclk_mhz;
545 			if (table[i].fabricclk_mhz < min_fclk_mhz) {
546 				table[i].fabricclk_mhz = min_fclk_mhz;
553 		if (table[i].dcfclk_mhz < min_dcfclk_mhz) {
554 			table[i].dcfclk_mhz = min_dcfclk_mhz;
558 	// Remove duplicate states, note duplicate states are always neighbouring since table is sorted.
561 		if (table[i].dcfclk_mhz == table[i + 1].dcfclk_mhz &&
562 				table[i].fabricclk_mhz == table[i + 1].fabricclk_mhz &&
563 				table[i].dram_speed_mts == table[i + 1].dram_speed_mts)
564 			remove_entry_from_table_at_index(table, num_entries, i + 1);
571 		table[i].state = i;
708 	/* Overrides Clock levelsfrom CLK Mgr table entries as reported by PM FW */
780 		// create the final dcfclk and uclk table