dml/dcn32/display_mode_vba_util_32.c

38 		enum output_encoder_class Output)
107 	dml_print("DML::%s: Output: %d\n", __func__, Output);
114 unsigned int dml32_dscComputeDelay(enum output_format_class pixelFormat, enum output_encoder_class Output)
256 		/* Output */
409 		enum output_encoder_class Output[],
443 		/* Output */
505 			/* Output */
563 	*UnboundedRequestEnabled = dml32_UnboundedRequest(UseUnboundedRequestingFinal, TotalActiveDPP, NoChromaSurfaces, Output[0], SurfaceTiling[0], *CompBufReservedSpaceNeedAdjustment, DisableUnboundRequestIfCompBufReservedSpaceNeedAdjustment);
582 			/* Output */
709 		/* Output */
880 			enum output_encoder_class Output,
889 	if (UseUnboundedRequestingFinal == dm_unbounded_requesting_edp_only && Output != dm_edp)
924 		/* Output */
1185 		enum output_encoder_class Output,
1198 		/* Output */
1230 	if (!(Output == dm_hdmi || Output == dm_dp || Output == dm_edp) && (ODMUse == dm_odm_combine_policy_4to1 ||
1241 	} else if (Output != dm_hdmi && (ODMUse == dm_odm_combine_policy_2to1 ||
1276 	if (Output == dm_hdmi && OutFormat == dm_420 &&
1342 		enum output_encoder_class Output,
1358 		/* Output */
1375 		if (Output == dm_hdmi) {
1379 					PixelClockBackEnd, ForcedOutputLinkBPP, false, Output, OutputFormat,
1385 		} else if (Output == dm_dp || Output == dm_dp2p0 || Output == dm_edp) {
1389 				if (Output == dm_dp || Output == dm_dp2p0)
1396 				if (Output == dm_dp2p0)
1401 			if (Output == dm_dp2p0) {
1407 							ForcedOutputLinkBPP, LinkDSCEnable, Output, OutputFormat,
1416 								ForcedOutputLinkBPP, LinkDSCEnable, Output,
1421 					//OutputTypeAndRate = Output & " UHBR10";
1429 							ForcedOutputLinkBPP, LinkDSCEnable, Output, OutputFormat,
1439 								ForcedOutputLinkBPP, LinkDSCEnable, Output,
1444 					//OutputTypeAndRate = Output & " UHBR13p5";
1452 							ForcedOutputLinkBPP, LinkDSCEnable, Output, OutputFormat,
1460 								ForcedOutputLinkBPP, LinkDSCEnable, Output,
1465 					//OutputTypeAndRate = Output & " UHBR20";
1475 							ForcedOutputLinkBPP, LinkDSCEnable, Output, OutputFormat,
1482 						if (Output == dm_dp)
1486 								ForcedOutputLinkBPP, LinkDSCEnable, Output,
1491 					//OutputTypeAndRate = Output & " HBR";
1492 					*OutputType = (Output == dm_dp) ? dm_output_type_dp : dm_output_type_edp;
1499 							ForcedOutputLinkBPP, LinkDSCEnable, Output, OutputFormat,
1507 						if (Output == dm_dp)
1512 								ForcedOutputLinkBPP, LinkDSCEnable, Output,
1517 					//OutputTypeAndRate = Output & " HBR2";
1518 					*OutputType = (Output == dm_dp) ? dm_output_type_dp : dm_output_type_edp;
1524 							ForcedOutputLinkBPP, LinkDSCEnable, Output,
1532 						if (Output == dm_dp)
1537 								ForcedOutputLinkBPP, LinkDSCEnable, Output,
1542 					//OutputTypeAndRate = Output & " HBR3";
1543 					*OutputType = (Output == dm_dp) ? dm_output_type_dp : dm_output_type_edp;
1581 		enum output_encoder_class Output,
1589 		/* Output */
1612 		if (Output == dm_hdmi) {
1629 	if (Output == dm_dp2p0) {
1631 	} else if (DSCEnable && Output == dm_dp) {
1723 		enum output_encoder_class Output,
1734 					OutputFormat, Output) + dml32_dscComputeDelay(OutputFormat, Output));
1738 					OutputFormat, Output) + dml32_dscComputeDelay(OutputFormat, Output));
1742 					OutputFormat, Output) + dml32_dscComputeDelay(OutputFormat, Output);
1799 		/* Output */
1927 		/* Output */
2044 					/* Output */
2076 					/* Output */
2118 				/* Output */
2150 				/* Output */
2175 			/* Output */
2233 				/* Output */
2286 		/* Output */
2545 		/* Output */
2679 		/* Output */
2740 		/* Output */
2826 		/* Output */
2975 		/* Output */
3427 		/* Output */
4143 		/* Output */
4282 		/* Output */
4716 		/* Output */
4908 		/* Output */
5164 		/* Output */
5317 		/* Output */
5641 		/* Output */
6080 		/* Output */