dml/dcn20/dcn20_fpu.c

1146 	int i, pipe_idx, active_hubp_count = 0;
1179 	for (i = 0, pipe_idx = 0; i < dc->res_pool->pipe_count; i++) {
1184 		pipes[pipe_idx].pipe.dest.vstartup_start = get_vstartup(&context->bw_ctx.dml, pipes, pipe_cnt, pipe_idx);
1185 		pipes[pipe_idx].pipe.dest.vupdate_offset = get_vupdate_offset(&context->bw_ctx.dml, pipes, pipe_cnt, pipe_idx);
1186 		pipes[pipe_idx].pipe.dest.vupdate_width = get_vupdate_width(&context->bw_ctx.dml, pipes, pipe_cnt, pipe_idx);
1187 		pipes[pipe_idx].pipe.dest.vready_offset = get_vready_offset(&context->bw_ctx.dml, pipes, pipe_cnt, pipe_idx);
1195 			context->res_ctx.pipe_ctx[i].unbounded_req = pipes[pipe_idx].pipe.src.unbounded_req_mode;
1198 		if (context->bw_ctx.bw.dcn.clk.dppclk_khz < pipes[pipe_idx].clks_cfg.dppclk_mhz * 1000)
1199 			context->bw_ctx.bw.dcn.clk.dppclk_khz = pipes[pipe_idx].clks_cfg.dppclk_mhz * 1000;
1201 						pipes[pipe_idx].clks_cfg.dppclk_mhz * 1000;
1202 		context->res_ctx.pipe_ctx[i].pipe_dlg_param = pipes[pipe_idx].pipe.dest;
1209 		pipe_idx++;
1222 						- context->bw_ctx.dml.ip.det_buffer_size_kbytes * pipe_idx;
1224 	for (i = 0, pipe_idx = 0; i < dc->res_pool->pipe_count; i++) {
1239 				pipe_idx,
1246 				&pipes[pipe_idx].pipe);
1247 		pipe_idx++;
1424 		pipes[pipe_cnt].pipe.src.hsplit_grp = res_ctx->pipe_ctx[i].pipe_idx;
1437 				pipes[pipe_cnt].pipe.src.hsplit_grp = first_pipe->pipe_idx;
1439 				pipes[pipe_cnt].pipe.src.hsplit_grp = res_ctx->pipe_ctx[i].pipe_idx;
1441 				pipes[pipe_cnt].pipe.src.hsplit_grp = res_ctx->pipe_ctx[i].top_pipe->pipe_idx;
1447 			pipes[pipe_cnt].pipe.src.hsplit_grp = first_pipe->pipe_idx;
1598 				pipes[pipe_cnt].pipe.src.hsplit_grp = res_ctx->pipe_ctx[i].pipe_idx;
1735 	int pipe_cnt, i, pipe_idx;
1739 	for (i = 0, pipe_idx = 0, pipe_cnt = 0; i < dc->res_pool->pipe_count; i++) {
1748 					context->bw_ctx.dml.vba.RequiredDPPCLK[vlevel][context->bw_ctx.dml.vba.maxMpcComb][pipe_idx];
1749 			if (context->bw_ctx.dml.vba.BlendingAndTiming[pipe_idx] == pipe_idx)
1751 						context->bw_ctx.dml.vba.ODMCombineEnabled[pipe_idx];
1754 			pipe_idx++;
1777 	if (pipe_cnt != pipe_idx) {
2142 			     int pipe_idx,
2148 		v->RequiredDPPCLK[vlevel][max_mpc_comb][pipe_idx] *= 2;
2150 		v->RequiredDPPCLK[vlevel][max_mpc_comb][pipe_idx] /= 2;
2241 	int pipe_cnt, i, pipe_idx;
2250 	for (i = 0, pipe_idx = 0, pipe_cnt = 0; i < dc->res_pool->pipe_count; i++) {
2259 						context->bw_ctx.dml.vba.RequiredDPPCLK[vlevel_req][context->bw_ctx.dml.vba.maxMpcComb][pipe_idx];
2260 				if (context->bw_ctx.dml.vba.BlendingAndTiming[pipe_idx] == pipe_idx)
2262 							context->bw_ctx.dml.vba.ODMCombineEnablePerState[vlevel_req][pipe_idx];
2265 				pipe_idx++;
2278 	if (pipe_cnt != pipe_idx) {