display/dc/dm_pp_smu.h

60 enum pp_smu_status {
173 	enum pp_smu_status (*set_display_count)(struct pp_smu *pp, int count);
178 	enum pp_smu_status (*set_hard_min_dcfclk_by_freq)(struct pp_smu *pp, int Mhz);
184 	enum pp_smu_status (*set_min_deep_sleep_dcfclk)(struct pp_smu *pp, int Mhz);
189 	enum pp_smu_status (*set_hard_min_uclk_by_freq)(struct pp_smu *pp, int Mhz);
194 	enum pp_smu_status (*set_hard_min_socclk_by_freq)(struct pp_smu *pp, int Mhz);
197 	enum pp_smu_status (*set_pme_wa_enable)(struct pp_smu *pp);
202 	enum pp_smu_status (*set_voltage_by_freq)(struct pp_smu *pp,
217 	enum pp_smu_status (*set_wm_ranges)(struct pp_smu *pp,
223 	enum pp_smu_status (*get_maximum_sustainable_clocks)(struct pp_smu *pp,
228 	enum pp_smu_status (*get_uclk_dpm_states)(struct pp_smu *pp,
240 	enum pp_smu_status (*set_pstate_handshake_support)(struct pp_smu *pp,
281 	enum pp_smu_status (*set_wm_ranges)(struct pp_smu *pp,
284 	enum pp_smu_status (*get_dpm_clock_table) (struct pp_smu *pp,
300 	enum pp_smu_status (*set_wm_ranges)(struct pp_smu *pp,
304 	enum pp_smu_status (*get_dpm_clock_table) (struct pp_smu *pp,
307 	enum pp_smu_status (*notify_smu_timeout) (struct pp_smu *pp);