dc/dcn35/dcn35_dio_stream_encoder.h

48 #define SE_DCN35_REG_LIST(id)\
49 	SRI(AFMT_CNTL, DIG, id), \
50 	SRI(DIG_FE_CNTL, DIG, id), \
51 	SRI(HDMI_CONTROL, DIG, id), \
52 	SRI(HDMI_DB_CONTROL, DIG, id), \
53 	SRI(HDMI_GC, DIG, id), \
54 	SRI(HDMI_GENERIC_PACKET_CONTROL0, DIG, id), \
55 	SRI(HDMI_GENERIC_PACKET_CONTROL1, DIG, id), \
56 	SRI(HDMI_GENERIC_PACKET_CONTROL2, DIG, id), \
57 	SRI(HDMI_GENERIC_PACKET_CONTROL3, DIG, id), \
58 	SRI(HDMI_GENERIC_PACKET_CONTROL4, DIG, id), \
59 	SRI(HDMI_GENERIC_PACKET_CONTROL5, DIG, id), \
60 	SRI(HDMI_GENERIC_PACKET_CONTROL6, DIG, id), \
61 	SRI(HDMI_GENERIC_PACKET_CONTROL7, DIG, id), \
62 	SRI(HDMI_GENERIC_PACKET_CONTROL8, DIG, id), \
63 	SRI(HDMI_GENERIC_PACKET_CONTROL9, DIG, id), \
64 	SRI(HDMI_GENERIC_PACKET_CONTROL10, DIG, id), \
65 	SRI(HDMI_INFOFRAME_CONTROL0, DIG, id), \
66 	SRI(HDMI_INFOFRAME_CONTROL1, DIG, id), \
67 	SRI(HDMI_VBI_PACKET_CONTROL, DIG, id), \
68 	SRI(HDMI_AUDIO_PACKET_CONTROL, DIG, id),\
69 	SRI(HDMI_ACR_PACKET_CONTROL, DIG, id),\
70 	SRI(HDMI_ACR_32_0, DIG, id),\
71 	SRI(HDMI_ACR_32_1, DIG, id),\
72 	SRI(HDMI_ACR_44_0, DIG, id),\
73 	SRI(HDMI_ACR_44_1, DIG, id),\
74 	SRI(HDMI_ACR_48_0, DIG, id),\
75 	SRI(HDMI_ACR_48_1, DIG, id),\
76 	SRI(DP_DB_CNTL, DP, id), \
77 	SRI(DP_MSA_MISC, DP, id), \
78 	SRI(DP_MSA_VBID_MISC, DP, id), \
79 	SRI(DP_MSA_COLORIMETRY, DP, id), \
80 	SRI(DP_MSA_TIMING_PARAM1, DP, id), \
81 	SRI(DP_MSA_TIMING_PARAM2, DP, id), \
82 	SRI(DP_MSA_TIMING_PARAM3, DP, id), \
83 	SRI(DP_MSA_TIMING_PARAM4, DP, id), \
84 	SRI(DP_MSE_RATE_CNTL, DP, id), \
85 	SRI(DP_MSE_RATE_UPDATE, DP, id), \
86 	SRI(DP_PIXEL_FORMAT, DP, id), \
87 	SRI(DP_SEC_CNTL, DP, id), \
88 	SRI(DP_SEC_CNTL1, DP, id), \
89 	SRI(DP_SEC_CNTL2, DP, id), \
90 	SRI(DP_SEC_CNTL5, DP, id), \
91 	SRI(DP_SEC_CNTL6, DP, id), \
92 	SRI(DP_STEER_FIFO, DP, id), \
93 	SRI(DP_VID_M, DP, id), \
94 	SRI(DP_VID_N, DP, id), \
95 	SRI(DP_VID_STREAM_CNTL, DP, id), \
96 	SRI(DP_VID_TIMING, DP, id), \
97 	SRI(DP_SEC_AUD_N, DP, id), \
98 	SRI(DP_SEC_TIMESTAMP, DP, id), \
99 	SRI(DP_DSC_CNTL, DP, id), \
100 	SRI(DP_SEC_METADATA_TRANSMISSION, DP, id), \
101 	SRI(HDMI_METADATA_PACKET_CONTROL, DIG, id), \
102 	SRI(DP_SEC_FRAMING4, DP, id), \
103 	SRI(DP_GSP11_CNTL, DP, id), \
104 	SRI(DME_CONTROL, DME, id),\
105 	SRI(DP_SEC_METADATA_TRANSMISSION, DP, id), \
106 	SRI(HDMI_METADATA_PACKET_CONTROL, DIG, id), \
107 	SRI(DIG_FE_CNTL, DIG, id), \
108 	SRI(DIG_FE_EN_CNTL, DIG, id), \
109 	SRI(DIG_FE_CLK_CNTL, DIG, id), \
110 	SRI(DIG_CLOCK_PATTERN, DIG, id), \
111 	SRI(DIG_FIFO_CTRL0, DIG, id),\
112 	SRI(STREAM_MAPPER_CONTROL, DIG, id)