dc/dcn31/dcn31_dio_link_encoder.c

43 	enc10->base.ctx
45 	enc10->base.ctx->logger
48 	(enc10->link_regs->reg)
52 	enc10->link_shift->field_name, enc10->link_mask->field_name
55 	(enc10->link_regs->index)
58 	(enc10->aux_regs->reg)
119 	struct dcn10_link_encoder *enc10 = TO_DCN10_LINK_ENC(enc);
126 	cmd->query_dp_alt.data.phy_id = phy_id_from_transmitter(enc10->base.transmitter);
139 	struct dcn10_link_encoder *enc10 = TO_DCN10_LINK_ENC(enc);
210 	struct dcn10_link_encoder *enc10 = TO_DCN10_LINK_ENC(enc);
246 	dcn10_aux_initialize(enc10);
294 	struct dcn10_link_encoder *enc10 = &enc20->enc10;
296 	enc10->base.funcs = &dcn31_link_enc_funcs;
297 	enc10->base.ctx = init_data->ctx;
298 	enc10->base.id = init_data->encoder;
300 	enc10->base.hpd_source = init_data->hpd_source;
301 	enc10->base.connector = init_data->connector;
303 	enc10->base.preferred_engine = ENGINE_ID_UNKNOWN;
305 	enc10->base.features = *enc_features;
307 	enc10->base.transmitter = init_data->transmitter;
315 		enc10->base.features.flags.bits.
318 	enc10->base.output_signals =
338 	enc10->link_regs = link_regs;
339 	enc10->aux_regs = aux_regs;
340 	enc10->hpd_regs = hpd_regs;
341 	enc10->link_shift = link_shift;
342 	enc10->link_mask = link_mask;
344 	switch (enc10->base.transmitter) {
346 		enc10->base.preferred_engine = ENGINE_ID_DIGA;
349 		enc10->base.preferred_engine = ENGINE_ID_DIGB;
352 		enc10->base.preferred_engine = ENGINE_ID_DIGC;
355 		enc10->base.preferred_engine = ENGINE_ID_DIGD;
358 		enc10->base.preferred_engine = ENGINE_ID_DIGE;
361 		enc10->base.preferred_engine = ENGINE_ID_DIGF;
365 		enc10->base.preferred_engine = ENGINE_ID_UNKNOWN;
369 	enc10->base.features.flags.bits.HDMI_6GB_EN = 1;
371 	result = bp_funcs->get_encoder_cap_info(enc10->base.ctx->dc_bios,
372 						enc10->base.id, &bp_cap_info);
376 		enc10->base.features.flags.bits.IS_HBR2_CAPABLE =
378 		enc10->base.features.flags.bits.IS_HBR3_CAPABLE =
380 		enc10->base.features.flags.bits.HDMI_6GB_EN = bp_cap_info.HDMI_6GB_EN;
381 		enc10->base.features.flags.bits.IS_DP2_CAPABLE = bp_cap_info.IS_DP2_CAPABLE;
382 		enc10->base.features.flags.bits.IS_UHBR10_CAPABLE = bp_cap_info.DP_UHBR10_EN;
383 		enc10->base.features.flags.bits.IS_UHBR13_5_CAPABLE = bp_cap_info.DP_UHBR13_5_EN;
384 		enc10->base.features.flags.bits.IS_UHBR20_CAPABLE = bp_cap_info.DP_UHBR20_EN;
385 		enc10->base.features.flags.bits.DP_IS_USB_C =
392 	if (enc10->base.ctx->dc->debug.hdmi20_disable) {
393 		enc10->base.features.flags.bits.HDMI_6GB_EN = 0;
404 	struct dcn10_link_encoder *enc10 = &enc20->enc10;
406 	enc10->base.funcs = &dcn31_link_enc_funcs;
407 	enc10->base.ctx = ctx;
408 	enc10->base.id.type = OBJECT_TYPE_ENCODER;
409 	enc10->base.hpd_source = HPD_SOURCEID_UNKNOWN;
410 	enc10->base.connector.type = OBJECT_TYPE_CONNECTOR;
411 	enc10->base.preferred_engine = eng_id;
412 	enc10->base.features = *enc_features;
413 	enc10->base.transmitter = TRANSMITTER_UNKNOWN;
414 	enc10->link_regs = link_regs;
416 	enc10->base.output_signals =
444 static void link_encoder_disable(struct dcn10_link_encoder *enc10)
455 	struct dcn10_link_encoder *enc10 = TO_DCN10_LINK_ENC(enc);
470 		enc1_configure_encoder(enc10, link_settings);
502 	struct dcn10_link_encoder *enc10 = TO_DCN10_LINK_ENC(enc);
517 		enc1_configure_encoder(enc10, link_settings);
548 	struct dcn10_link_encoder *enc10 = TO_DCN10_LINK_ENC(enc);
588 		link_encoder_disable(enc10);
594 	struct dcn10_link_encoder *enc10 = TO_DCN10_LINK_ENC(enc);
622 		if ((enc10->base.transmitter == TRANSMITTER_UNIPHY_A) ||
623 		    (enc10->base.transmitter == TRANSMITTER_UNIPHY_B) ||
624 		    (enc10->base.transmitter == TRANSMITTER_UNIPHY_E)) {
638 	struct dcn10_link_encoder *enc10 = TO_DCN10_LINK_ENC(enc);
668 		if ((enc10->base.transmitter == TRANSMITTER_UNIPHY_A) ||
669 		    (enc10->base.transmitter == TRANSMITTER_UNIPHY_B) ||
670 		    (enc10->base.transmitter == TRANSMITTER_UNIPHY_E)) {