Lines Matching refs:timing
243 const struct dc_crtc_timing *timing)
245 uint32_t vsync_offset = timing->v_border_bottom +
246 timing->v_front_porch;
247 uint32_t v_sync_start = timing->v_addressable + vsync_offset;
249 uint32_t hsync_offset = timing->h_border_right +
250 timing->h_front_porch;
251 uint32_t h_sync_start = timing->h_addressable + hsync_offset;
262 timing->h_total - 1,
271 timing->v_total - 1,
279 tmp = timing->h_total -
280 (h_sync_start + timing->h_border_left);
288 tmp = tmp + timing->h_addressable +
289 timing->h_border_left + timing->h_border_right;
302 tmp = timing->v_total - (v_sync_start + timing->v_border_top);
310 tmp = tmp + timing->v_addressable + timing->v_border_top +
311 timing->v_border_bottom;
325 timing->h_sync_width,
332 if (timing->flags.HSYNC_POSITIVE_POLARITY) {
351 timing->v_sync_width,
358 if (timing->flags.VSYNC_POSITIVE_POLARITY) {
377 timing->flags.INTERLACE,
386 const struct dc_crtc_timing *timing)
392 if ((timing->v_sync_width + timing->v_front_porch) <= 3) {
436 const struct dc_crtc_timing *timing,
445 dce110_timing_generator_program_timing_generator(tg, timing);
447 dce110_timing_generator_v_program_blanking(tg, timing);