Lines Matching refs:mem_input110

40 	struct dce_mem_input *mem_input110,
46 mem_input110->base.ctx,
54 mem_input110->base.ctx,
61 struct dce_mem_input *mem_input110,
75 mem_input110->base.ctx,
89 mem_input110->base.ctx,
96 struct dce_mem_input *mem_input110,
111 mem_input110->base.ctx,
125 mem_input110->base.ctx,
131 struct dce_mem_input *mem_input110,
137 mem_input110,
142 mem_input110,
145 mem_input110,
154 static void enable(struct dce_mem_input *mem_input110)
158 value = dm_read_reg(mem_input110->base.ctx, mmUNP_GRPH_ENABLE);
160 dm_write_reg(mem_input110->base.ctx,
166 struct dce_mem_input *mem_input110,
203 mem_input110->base.ctx,
225 mem_input110->base.ctx,
231 struct dce_mem_input *mem_input110,
256 mem_input110->base.ctx,
264 mem_input110->base.ctx,
272 mem_input110->base.ctx,
280 mem_input110->base.ctx,
288 mem_input110->base.ctx,
296 mem_input110->base.ctx,
305 mem_input110->base.ctx,
314 mem_input110->base.ctx,
323 mem_input110->base.ctx,
332 mem_input110->base.ctx,
357 mem_input110->base.ctx,
363 struct dce_mem_input *mem_input110,
372 mem_input110->base.ctx,
420 mem_input110->base.ctx,
425 mem_input110->base.ctx,
435 mem_input110->base.ctx,
445 mem_input110->base.ctx,
467 mem_input110->base.ctx,
475 struct dce_mem_input *mem_input110 = TO_DCE_MEM_INPUT(mem_input);
478 value = dm_read_reg(mem_input110->base.ctx, mmUNP_GRPH_UPDATE);
493 struct dce_mem_input *mem_input110 = TO_DCE_MEM_INPUT(mem_input);
495 set_flip_control(mem_input110, flip_immediate);
496 program_addr(mem_input110,
571 struct dce_mem_input *mem_input110 = TO_DCE_MEM_INPUT(mem_input);
609 value = dm_read_reg(mem_input110->base.ctx, mmUNP_PIPE_OUTSTANDING_REQUEST_LIMIT);
613 dm_write_reg(mem_input110->base.ctx, mmUNP_PIPE_OUTSTANDING_REQUEST_LIMIT, value);
615 value = dm_read_reg(mem_input110->base.ctx, mmUNP_DVMM_PTE_CONTROL);
619 dm_write_reg(mem_input110->base.ctx, mmUNP_DVMM_PTE_CONTROL, value);
621 value = dm_read_reg(mem_input110->base.ctx, mmUNP_DVMM_PTE_ARB_CONTROL);
624 dm_write_reg(mem_input110->base.ctx, mmUNP_DVMM_PTE_ARB_CONTROL, value);
626 value = dm_read_reg(mem_input110->base.ctx, mmUNP_DVMM_PTE_CONTROL_C);
630 dm_write_reg(mem_input110->base.ctx, mmUNP_DVMM_PTE_CONTROL_C, value);
632 value = dm_read_reg(mem_input110->base.ctx, mmUNP_DVMM_PTE_ARB_CONTROL_C);
635 dm_write_reg(mem_input110->base.ctx, mmUNP_DVMM_PTE_ARB_CONTROL_C, value);
647 struct dce_mem_input *mem_input110 = TO_DCE_MEM_INPUT(mem_input);
649 enable(mem_input110);
650 program_tiling(mem_input110, tiling_info, format);
651 program_size_and_rotation(mem_input110, rotation, plane_size);
652 program_pixel_format(mem_input110, format);