Lines Matching refs:FMT_CONTROL
227 REG_UPDATE_2(FMT_CONTROL,
231 REG_UPDATE_2(FMT_CONTROL,
237 REG_UPDATE_2(FMT_CONTROL,
476 REG_UPDATE_3(FMT_CONTROL,
481 REG_UPDATE_2(FMT_CONTROL,
486 REG_UPDATE_2(FMT_CONTROL,
491 REG_UPDATE_3(FMT_CONTROL,
502 * DCE6 has no FMT_SUBSAMPLING_{MODE,ORDER} bits in FMT_CONTROL reg
512 REG_UPDATE_2(FMT_CONTROL,
516 REG_UPDATE(FMT_CONTROL,
520 REG_UPDATE(FMT_CONTROL,
524 REG_UPDATE_2(FMT_CONTROL,
590 REG_UPDATE(FMT_CONTROL,
643 REG_UPDATE(FMT_CONTROL,
647 REG_WAIT(FMT_CONTROL, FMT_420_PIXEL_PHASE_LOCKED, 1, 10, 10);