dc/dce/dce_aux.c

241 	/* program action and address and payload data (if 'is_write') */
533 static enum i2caux_transaction_action i2caux_action_from_payload(struct aux_payload *payload)
535 	if (payload->i2c_over_aux) {
536 		if (payload->write_status_update) {
537 			if (payload->mot)
542 		if (payload->write) {
543 			if (payload->mot)
548 		if (payload->mot)
553 	if (payload->write)
560 		struct aux_payload *payload,
583 	if (payload->i2c_over_aux)
588 	aux_req.action = i2caux_action_from_payload(payload);
590 	aux_req.address = payload->address;
592 	aux_req.length = payload->length;
593 	aux_req.data = payload->data;
601 		bytes_replied = read_channel_reply(aux_engine, payload->length,
602 					 payload->data, payload->reply,
605 					EVENT_LOG_AUX_ORIGIN_NATIVE, *payload->reply,
606 					bytes_replied, payload->data);
617 		struct aux_payload *payload,
632 	return dm_helper_dmub_aux_transfer_sync(ddc->ctx, ddc->link, payload, operation_result);
644 	unsigned char *payload, uint32_t length, uint32_t max_length_to_log)
649 	if (payload && length) {
653 		unsigned char *payload_ptr = payload;
670 		payload_ptr = payload;
689 					"dce_aux_log_payload: %s: length=%u: data: <empty payload>",
696 		struct aux_payload *payload)
720 	if (!payload->reply) {
722 		payload->reply = &reply;
732 					payload->address,
733 					payload->length,
734 					(unsigned int) payload->write,
735 					(unsigned int) payload->mot);
736 		if (payload->write)
737 			dce_aux_log_payload("  write", payload->data, payload->length, 16);
738 		ret = dce_aux_transfer_raw(ddc, payload, &operation_result);
741 					"dce_aux_transfer_with_retries: link_index=%u: END: retry %d of %d: address=0x%04x length=%u write=%d mot=%d: ret=%d operation_result=%d payload->reply=%u",
745 					payload->address,
746 					payload->length,
747 					(unsigned int) payload->write,
748 					(unsigned int) payload->mot,
751 					(unsigned int) *payload->reply);
752 		if (!payload->write)
753 			dce_aux_log_payload("  read", payload->data, ret > 0 ? ret : 0, 16);
760 			switch (*payload->reply) {
765 				if (!payload->write && payload->length != ret) {
775 				} else if (payload->write && ret > 0) {
787 					 * NOTE: payload is modified here
789 					payload->write = false;
790 					payload->write_status_update = true;
791 					payload->length = 0;
811 				if (*payload->reply == AUX_TRANSACTION_REPLY_I2C_OVER_AUX_DEFER)
829 					if ((*payload->reply == AUX_TRANSACTION_REPLY_AUX_DEFER) ||
830 						(*payload->reply == AUX_TRANSACTION_REPLY_I2C_OVER_AUX_DEFER)) {
833 									"dce_aux_transfer_with_retries: payload->defer_delay=%u",
834 									payload->defer_delay);
835 						fsleep(payload->defer_delay * 1000);
836 						defer_time_in_ms += payload->defer_delay;
876 							"dce_aux_transfer_with_retries: AUX_RET_SUCCESS: FAILURE: AUX_TRANSACTION_REPLY_* unknown, default case. Reply: %d", *payload->reply);
910 				} else if (payload->defer_delay > 0) {
913 								"dce_aux_transfer_with_retries: payload->defer_delay=%u",
914 								payload->defer_delay);
915 					msleep(payload->defer_delay);
951 		payload->reply = NULL;