dc/dce/dce_aux.c

83 	dal_ddc_close(engine->ddc);
85 	engine->ddc = NULL;
277 	EVENT_LOG_AUX_REQ(engine->ddc->pin_data->en, EVENT_LOG_AUX_ORIGIN_NATIVE,
400 	struct ddc *ddc)
407 	result = dal_ddc_open(ddc, GPIO_MODE_HARDWARE,
414 		engine->ddc = ddc;
419 	engine->ddc = ddc;
434 static uint32_t dce_aux_configure_timeout(struct ddc_service *ddc,
442 	struct ddc *ddc_pin = ddc->ddc_pin;
443 	struct dce_aux *aux_engine = ddc->ctx->dc->res_pool->engines[ddc_pin->pin_data->en];
516 	aux_engine110->base.ddc = NULL;
559 int dce_aux_transfer_raw(struct ddc_service *ddc,
563 	struct ddc *ddc_pin = ddc->ddc_pin;
577 	aux_engine = ddc->ctx->dc->res_pool->engines[ddc_pin->pin_data->en];
604 		EVENT_LOG_AUX_REP(aux_engine->ddc->pin_data->en,
616 int dce_aux_transfer_dmub_raw(struct ddc_service *ddc,
620 	struct ddc *ddc_pin = ddc->ddc_pin;
623 		struct dce_aux *aux_engine = ddc->ctx->dc->res_pool->engines[ddc_pin->pin_data->en];
624 		/* XXX: Workaround to configure ddc channels for aux transactions */
632 	return dm_helper_dmub_aux_transfer_sync(ddc->ctx, ddc->link, payload, operation_result);
695 bool dce_aux_transfer_with_retries(struct ddc_service *ddc,
703 	struct ddc *ddc_pin = ddc->ddc_pin;
716 		aux_engine = ddc->ctx->dc->res_pool->engines[ddc_pin->pin_data->en];
729 					ddc && ddc->link ? ddc->link->link_index : UINT_MAX,
738 		ret = dce_aux_transfer_raw(ddc, payload, &operation_result);
742 					ddc && ddc->link ? ddc->link->link_index : UINT_MAX,