clk_mgr/dcn315/dcn315_clk_mgr.c

195 	if (new_clocks->dppclk_khz < MIN_DPP_DISP_CLK)
196 		new_clocks->dppclk_khz = MIN_DPP_DISP_CLK;
200 	if (should_set_clock(safe_to_lower, new_clocks->dppclk_khz, clk_mgr->base.clks.dppclk_khz)) {
201 		if (clk_mgr->base.clks.dppclk_khz > new_clocks->dppclk_khz)
203 		clk_mgr_base->clks.dppclk_khz = new_clocks->dppclk_khz;
223 		dcn315_smu_set_dppclk(clk_mgr, clk_mgr_base->clks.dppclk_khz);
227 			dcn315_smu_set_dppclk(clk_mgr, clk_mgr_base->clks.dppclk_khz);
229 		if (new_clocks->dppclk_khz >= dc->current_state->bw_ctx.bw.dcn.clk.dppclk_khz)
241 	cmd.notify_clocks.clocks.dppclk_khz = clk_mgr_base->clks.dppclk_khz;