Lines Matching refs:uint32_t
35 uint32_t numFractionalBits;
76 uint32_t MmHubPadding[7]; // SMU internal use
121 uint32_t FClk;
122 uint32_t MemClk;
123 uint32_t Voltage;
131 uint32_t DcfClocks[NUM_DCFCLK_DPM_LEVELS];
132 uint32_t DispClocks[NUM_DISPCLK_DPM_LEVELS];
133 uint32_t DppClocks[NUM_DPPCLK_DPM_LEVELS];
134 uint32_t SocClocks[NUM_SOCCLK_DPM_LEVELS];
135 uint32_t VClocks[NUM_VCN_DPM_LEVELS];
136 uint32_t DClocks[NUM_VCN_DPM_LEVELS];
137 uint32_t SocVoltage[NUM_SOC_VOLTAGE_LEVELS];
147 uint32_t MinGfxClk;
148 uint32_t MaxGfxClk;
233 uint32_t MmHubPadding[7]; // SMU internal use
251 uint32_t data;
260 void dcn31_smu_set_display_idle_optimization(struct clk_mgr_internal *clk_mgr, uint32_t idle_info);
263 void dcn31_smu_set_dram_addr_high(struct clk_mgr_internal *clk_mgr, uint32_t addr_high);
264 void dcn31_smu_set_dram_addr_low(struct clk_mgr_internal *clk_mgr, uint32_t addr_low);